From 5d6232f08fb5597aa3833f69e52ecbb4be250071 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 28 Jul 2021 22:09:45 +0200 Subject: vhdl: move check on instantiation name from sem to parse. Fix #1823 --- src/vhdl/vhdl-parse.adb | 3 +++ src/vhdl/vhdl-sem_stmts.adb | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb index e958b8f09..726e8e1f4 100644 --- a/src/vhdl/vhdl-parse.adb +++ b/src/vhdl/vhdl-parse.adb @@ -9617,6 +9617,9 @@ package body Vhdl.Parse is return Res; when Tok_Generic | Tok_Port => -- or a component instantiation. + if Get_Kind (Target) not in Iir_Kinds_Denoting_Name then + Error_Msg_Parse (+Target, "component name expected"); + end if; return Parse_Component_Instantiation (Target); when others => -- Catch PSL clock declaration. Within comments, this is the diff --git a/src/vhdl/vhdl-sem_stmts.adb b/src/vhdl/vhdl-sem_stmts.adb index 771a09c3a..8c16b6cea 100644 --- a/src/vhdl/vhdl-sem_stmts.adb +++ b/src/vhdl/vhdl-sem_stmts.adb @@ -1880,7 +1880,7 @@ package body Vhdl.Sem_Stmts is -- Needs a denoting name if Get_Kind (Inst) not in Iir_Kinds_Denoting_Name then - Error_Msg_Sem (+Inst, "name for a component expected"); + -- Error message already issued during parse. return Null_Iir; end if; -- cgit v1.2.3