From 0f3f7064aabccd89c1413aab4cac56f8a851fa55 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 15 Jun 2021 06:44:57 +0200
Subject: synth: minor fixes

---
 src/synth/netlists-memories.adb | 15 +++++++--------
 src/synth/synth-environment.adb |  2 +-
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/synth/netlists-memories.adb b/src/synth/netlists-memories.adb
index b19c4fda2..c682610cb 100644
--- a/src/synth/netlists-memories.adb
+++ b/src/synth/netlists-memories.adb
@@ -1251,9 +1251,8 @@ package body Netlists.Memories is
                O := Get_Output (Inst, 0);
             when others =>
                if Flag_Memory_Verbose then
-                  Info_Msg_Synth
-                    (+Last, "gate %i cannot be part of a memory",
-                     (1 => +Inst));
+                  Info_Msg_Synth (+Last, "gate %i cannot be part of a memory",
+                                  (1 => +Inst));
                end if;
                return No_Instance;
          end case;
@@ -1402,8 +1401,8 @@ package body Netlists.Memories is
    end Validate_RAM_Multiple;
 
    --  Test if V is part of the conjunction CONJ generated by mux2 controls.
-   function Test_In_Conjuction (Conj : Net; V : Net; Negate : Boolean)
-                               return Boolean
+   function In_Conjunction (Conj : Net; V : Net; Negate : Boolean)
+                           return Boolean
    is
       Inst : Instance;
       N : Net;
@@ -1427,7 +1426,7 @@ package body Netlists.Memories is
          end if;
          N := Get_Input_Net (Inst, 1);
       end loop;
-   end Test_In_Conjuction;
+   end In_Conjunction;
 
    --  Subroutine of Reduce_Extract_Muxes.
    --  MUX is a mux2 that is removed if possible.
@@ -1465,7 +1464,7 @@ package body Netlists.Memories is
       loop
          --  Get the enable of Dyn_Insert_En parent.
          N := Get_Input_Net (P, 3);
-         if not Test_In_Conjuction (N, Sel, Port = 0) then
+         if not In_Conjunction (N, Sel, Port = 0) then
             if Flag_Memory_Verbose then
                Info_Msg_Synth
                  (+Mux, "mux %i before extract is required",
@@ -2620,7 +2619,7 @@ package body Netlists.Memories is
       end;
    end Reduce_Muxes;
 
-   --  Remove the mux2 MUX (by adding enable to dyn_insert).
+   --  Remove the mux2 HEAD (by adding enable to dyn_insert).
    --  Return the new head.
    procedure Reduce_Muxes_Mux2 (Ctxt : Context_Acc;
                                 Clk : Net;
diff --git a/src/synth/synth-environment.adb b/src/synth/synth-environment.adb
index 9c9385dd4..bd5202e6a 100644
--- a/src/synth/synth-environment.adb
+++ b/src/synth/synth-environment.adb
@@ -415,7 +415,7 @@ package body Synth.Environment is
                     Partial_Assign_Table.Table (P);
                begin
                   if Synth.Flags.Flag_Debug_Noinference then
-                     Res := Pa.Value;
+                     Add_Conc_Assign (Wid, Pa.Value, Pa.Offset);
                   elsif Wire_Rec.Kind = Wire_Enable then
                      --  Possibly infere a idff/iadff.
                      pragma Assert (Pa.Offset = 0);
-- 
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