| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl-scanner: adjust assertion. For #2070 | Tristan Gingold | 2022-06-01 | 1 | -1/+1 |
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| * | vhdl: add tok_inherit. Preliminary work for #1899 | Tristan Gingold | 2021-11-03 | 1 | -0/+2 |
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| * | vhdl-scanner: improve error message. Fix #1883 | Tristan Gingold | 2021-10-06 | 1 | -1/+2 |
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| * | Add parsing of case? statement and simple test. | Brian Padalino | 2021-09-24 | 1 | -2/+1 |
| | | | | | Also add the Matching flag to the Iir_Kind_Case_Statement. | ||||
| * | vhdl-scanner.adb: add comments | Tristan Gingold | 2021-09-03 | 1 | -0/+6 |
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| * | vhdl and psl: parse sync_abort and async_abort. For #1654 | Tristan Gingold | 2021-08-30 | 1 | -0/+4 |
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| * | vhdl-scanner: improve column for scanner messages | Tristan Gingold | 2021-05-23 | 1 | -1/+4 |
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| * | Add support for PSL onehot/onehot0 functions (#1633) | T. Meissner | 2021-02-09 | 1 | -0/+8 |
| | | | | | | | | | | | | | | | | * vhdl: parse PSL onehot/onehot0 builtin calls. For #662 * update pyGHDL bindings * Synthesis of PSL built-in onehot/onehot0 function. * testsuite/synth: add tests of PSL built-in functions onehot()/onehot0() for #662 * doc: add info about PSL built-in functions onehot()/onehot0() for #662 * synth: refactor synthesis of onehot/onehot0 functions Co-authored-by: eine <eine@users.noreply.github.com> | ||||
| * | update license headers | umarcor | 2021-01-14 | 1 | -11/+9 |
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| * | vhdl: rework formatter engine, add 'ghdl fmt' command | Tristan Gingold | 2021-01-09 | 1 | -39/+69 |
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| * | vhdl-scanner: be case-insensitive for pragma in comments. | Tristan Gingold | 2020-07-01 | 1 | -6/+19 |
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| * | vhdl psl: add support for equivalence operator. Fix #1371 | Tristan Gingold | 2020-06-16 | 1 | -0/+8 |
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| * | vhdl: parse statements in verification units. | Tristan Gingold | 2020-06-11 | 1 | -12/+2 |
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| * | vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662 | Tristan Gingold | 2020-06-02 | 1 | -42/+60 |
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| * | vhdl-scanner: makes -C part of -frelaxed | Tristan Gingold | 2020-05-25 | 1 | -1/+3 |
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| * | vhdl: handle pragma synthesis_on/synthesis_off. | Tristan Gingold | 2020-04-11 | 1 | -7/+9 |
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| * | vhdl-scanner: handle pragma translate on/off. | Tristan Gingold | 2020-03-22 | 1 | -13/+26 |
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| * | vhdl-scanner: abstract Scan_Comment_Pragma | Tristan Gingold | 2020-03-13 | 1 | -32/+40 |
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| * | synthesis: add option --vendor-library= for synthesis. | Tristan Gingold | 2020-03-10 | 1 | -5/+6 |
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| * | vhdl-scanner: improve error message for empty quote. | Tristan Gingold | 2020-02-04 | 1 | -0/+6 |
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| * | vhdl: handle -gGEN=VAL for --synth. Fix #1062 | Tristan Gingold | 2020-01-01 | 1 | -15/+14 |
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| * | vhdl-scanner: handle 'synopsys' pragma. | Tristan Gingold | 2019-11-04 | 1 | -1/+2 |
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| * | vhdl: try to convert identifier to token only for identifiers | Tristan Gingold | 2019-10-20 | 1 | -1/+3 |
| | | | | | | (and not for bit string literal). Fix #983 | ||||
| * | vhdl psl: fully scan PSL keywords in scanner. | Tristan Gingold | 2019-08-20 | 1 | -31/+54 |
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| * | vhdl: recognize PSL units reserved words. | Tristan Gingold | 2019-08-16 | 1 | -0/+6 |
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| * | vhdl: add PSL keywords to vhdl08 reserved words. | Tristan Gingold | 2019-08-14 | 1 | -9/+33 |
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| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 1 | -0/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * vhdl: make the parser understand PSL assume * assume does not actually have report according to the spec. Just a property. * add SPL assume to semantic analysis * canonicalise PSL assume * add assume to annotations * add PSL assume to simulation code * statement -> directive * add assume to translation files * update ticked24 testcase * correctly parse assume * add assume testcase * refactor chunk of duplicated code | ||||
| * | vhdl: handle (discard) more pragmas. | Tristan Gingold | 2019-07-25 | 1 | -0/+8 |
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| * | vhdl scanner: handle pragma translate_on/translate_off. | Tristan Gingold | 2019-07-24 | 1 | -3/+94 |
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| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -0/+4 |
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| * | Error_Msg_Option: do not raise exception. | Tristan Gingold | 2019-06-25 | 1 | -1/+9 |
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| * | vhdl-scanner: optimization | Tristan Gingold | 2019-06-03 | 1 | -6/+17 |
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| * | vhdl: differenciate block and line comments. | Tristan Gingold | 2019-05-30 | 1 | -2/+2 |
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| * | vhdl-disp_vhdl: print literals and identifiers from the source. | Tristan Gingold | 2019-05-29 | 1 | -0/+5 |
| | | | | | Add Literal_Length and set it in the parser. | ||||
| * | errorout: add messages group instead of continuation. | Tristan Gingold | 2019-05-12 | 1 | -7/+9 |
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| * | vhdl: decouple errorouts a bit more. | Tristan Gingold | 2019-05-10 | 1 | -28/+45 |
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| * | vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64. | Tristan Gingold | 2019-05-10 | 1 | -10/+10 |
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| * | vhdl: move scanner under vhdl hierarchy. | Tristan Gingold | 2019-05-04 | 1 | -0/+2332 |
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index : iCE40/ghdl | |
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