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* grt: simplifies grt-readline, adjust casingTristan Gingold2022-05-151-6/+4
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* elab-vhdl_stmts: change parent of generate_body for for-generateTristan Gingold2022-05-141-1/+1
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* ghdlsimul: add and improve debuggerTristan Gingold2022-05-145-25/+461
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* elab-vhdl_context: add get_instance_parentTristan Gingold2022-05-142-0/+10
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* fix: avoid "pragma Unreferenced given" warnings with GCC 12Xiretza2022-05-141-1/+1
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* fix: avoid "unnecessary with of ancestor [-gnatwr]" with GCC 12Xiretza2022-05-142-3/+0
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* synth: implement file_open with statusTristan Gingold2022-05-123-0/+69
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* synth-vhdl_stmts: export synth_targetTristan Gingold2022-05-122-35/+39
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* synth-vhdl_expr: add an hook to get the value of a signalTristan Gingold2022-05-122-0/+9
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* elab-vhdl_debug: also disp declarations in instancesTristan Gingold2022-05-121-4/+1
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* elab-memtype.adb: identationTristan Gingold2022-05-121-1/+1
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* synth: handle text file writeTristan Gingold2022-05-113-0/+93
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* synth: add a flag to force creation of variablesTristan Gingold2022-05-115-9/+21
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* synth: add current_stmt, minor reworkTristan Gingold2022-05-094-61/+99
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* synth-vhdl_insts: handle interfaces of type interface type. Fix #2053Tristan Gingold2022-05-071-1/+12
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* elab-vhdl_context: introduce signal_indexTristan Gingold2022-05-063-3/+12
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* synth-vhdl_context: resize table before access. Fix #2049Tristan Gingold2022-05-021-6/+14
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* netlists: fix incorrect access (realloc). Fix #2046Tristan Gingold2022-05-021-8/+11
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* elab-vhdl_debug: also print objects in disp_hierarchyTristan Gingold2022-05-012-58/+139
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* elab-vhdl_objtypes: fix restart of libghdlTristan Gingold2022-04-302-6/+23
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* synth: avoid a crash after an errorTristan Gingold2022-04-292-0/+19
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* elab-vhdl_insts: use block configuration from configurationTristan Gingold2022-04-291-3/+6
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* synth: adjust elab-debugger__on.adbTristan Gingold2022-04-291-8/+4
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* elab-vhdl_types: do not crash on signal resolverTristan Gingold2022-04-291-0/+3
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* synth-vhdl_eval: handle all comparisons for enumsTristan Gingold2022-04-291-33/+29
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* synth-vhdl_decls: handle attributes on input portsTristan Gingold2022-04-291-2/+10
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* synth: extract elab-vhdl_debug from elab-debuggerTristan Gingold2022-04-293-465/+662
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* elab-vhdl_insts: handle open unconstrained port associationTristan Gingold2022-04-291-0/+3
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* synth-vhdl_stmts: handle static evaluation for cond variable assignmentTristan Gingold2022-04-281-18/+53
| | | | Fix #2045
* netlists-memories: detect simple loop. Fix #2043Tristan Gingold2022-04-281-3/+10
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* synth-ieee-numeric_std: factorize codeTristan Gingold2022-04-281-14/+5
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* synth-vhdl_eval: handle absTristan Gingold2022-04-273-19/+61
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* synth-vhdl_stmts: add implicit conversion for cond assignmentTristan Gingold2022-04-271-0/+5
| | | | | Fix #2042 (The first issue only)
* synth: renaming (synth-static_oper -> synth-vhdl_eval)Tristan Gingold2022-04-273-57/+57
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* synth-static_oper: abstract codeTristan Gingold2022-04-271-21/+30
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* synth-static_oper: handle bit/boolean array element operationsTristan Gingold2022-04-271-0/+26
| | | | | (at least and). Fix #1898
* synth: abstract code for reuse by evaluationTristan Gingold2022-04-267-52/+78
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* synth-static_oper: fully remove dependency on synth_instanceTristan Gingold2022-04-263-39/+44
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* synth-static_oper: do not depend on instance for static operations.Tristan Gingold2022-04-267-62/+91
| | | | Preliminary work to support evaluation
* netlists-disp_verilog: output default value for pmux. Fix #2041Tristan Gingold2022-04-211-0/+1
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* synth-vhdl_stmts: check subtype compatibility for scalar signal assoc.Tristan Gingold2022-04-153-1/+93
| | | | Fix #2032
* synth: do not emit a warning for the gclk attribute. Fix #2035Tristan Gingold2022-04-131-1/+2
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* synth: handle type declarations in vunit. Fix #2034Tristan Gingold2022-04-132-12/+18
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* synth: add support for subtype declaration in vunits. Fix #2033Tristan Gingold2022-04-132-3/+8
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* elab-vhdl_insts: also recurse for instantiations in vunits.Tristan Gingold2022-04-081-74/+93
| | | | Fix #2025
* synth-vhdl_stmts: emit an error message on missing return. Fix #2019Tristan Gingold2022-04-061-1/+3
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* synth-vhdl_insts: also finalize entity declarationsTristan Gingold2022-04-061-0/+1
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* synth: do not add info for element subtype (except for arrays).Tristan Gingold2022-04-053-17/+33
| | | | Fix #2021
* synth: handle individual assoc of unbounded interface. Fix #2023Tristan Gingold2022-04-042-1/+4
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* synth: handle shared variable without default value.Tristan Gingold2022-04-042-1/+4
| | | | For #2023
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