iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	synth: improve output of memory initial value.	Tristan Gingold	2020-03-29	1	-3/+8
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*	netlists-memories: add flag_memory_verbose	Tristan Gingold	2020-03-28	1	-2/+7
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*	synth: remove useless note message.	Tristan Gingold	2020-03-28	1	-2/+5
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*	synth: preliminary support of multiport rams (using shared variable).	Tristan Gingold	2020-03-28	1	-321/+542
\| \| \| \|	For #1069
*	netlists: rework memories to fix port orders, add a loop.	Tristan Gingold	2020-02-23	1	-19/+45
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*	netlists-memories: also reduce muxes for extract.	Tristan Gingold	2020-02-21	1	-7/+35
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*	netlists-memories: factorize code.	Tristan Gingold	2020-02-20	1	-235/+191
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*	synthesis: rework memory inference.	Tristan Gingold	2020-02-16	1	-22/+90
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*	netlists-memories: handle split memories. Fix #1127	Tristan Gingold	2020-02-11	1	-8/+18
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*	netlists-memories: cleanup.	Tristan Gingold	2020-02-10	1	-319/+1
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*	synth: rework (again) memory inference.	Tristan Gingold	2020-02-10	1	-38/+237
\| \| \| \| \| \|	Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
*	synth: fix a typo in a comment.	Tristan Gingold	2020-01-18	1	-1/+1
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*	netlists-memories: fix split of memory content. Fix	Tristan Gingold	2020-01-16	1	-4/+131
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*	netlists-memories: allow initialized rams. For #1090	Tristan Gingold	2020-01-13	1	-1/+2
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*	netlists-memories: allow intermediate signals to detect sync read.	Tristan Gingold	2020-01-12	1	-2/+2
\| \| \| \|	Fix #1079
*	netlists-disp_vhdl: handle conversion from std_logic to signed/unsigned.	Tristan Gingold	2019-12-24	1	-6/+8
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*	netlists-memories: add convert_to_memory.	Tristan Gingold	2019-12-24	1	-298/+504
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*	synth: add Get_Input_Instance.	Tristan Gingold	2019-12-14	1	-10/+8
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*	netlists-memories: add comments.	Tristan Gingold	2019-12-14	1	-2/+44
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*	netlists-memories: remove unused subprograms.	Tristan Gingold	2019-12-08	1	-318/+0
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*	netlists-memories: reduce muxes.	Tristan Gingold	2019-12-08	1	-1/+162
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*	synth: rework in netlists-memories.	Tristan Gingold	2019-12-06	1	-61/+128
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*	netlists-memories: avoid a crash when no read. Fix #1018	Tristan Gingold	2019-12-05	1	-1/+7
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*	netlists-memories: improve ROM inference. For issue #1008	Tristan Gingold	2019-12-05	1	-26/+48
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*	netlists-memories: generate mem_rd_sync gates.	Tristan Gingold	2019-12-05	1	-169/+142
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*	netlists-memories: rework.	Tristan Gingold	2019-12-05	1	-2/+855
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*	netlists-memories: do not crash on anonymous ROM.	Tristan Gingold	2019-11-12	1	-3/+6
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*	netlists: optimize trunc.	Tristan Gingold	2019-11-11	1	-1/+3
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*	netlists-memories: truncate wide addresses.	Tristan Gingold	2019-11-05	1	-11/+9
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*	netlists-memories: adjust message.	Tristan Gingold	2019-11-05	1	-1/+1
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*	synth: fix multiport read memories (for issue #1000)	Tristan Gingold	2019-11-03	1	-1/+3
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*	netlits: fix memidx order.	Tristan Gingold	2019-11-01	1	-1/+3
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*	synth: adjust computation of max for dyn_extract.	Tristan Gingold	2019-10-28	1	-4/+2
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*	nelists-memories: reject memories with reset.	Tristan Gingold	2019-10-21	1	-1/+4
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*	netlists-memories: fixes in ROM.	Tristan Gingold	2019-10-20	1	-48/+51
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*	netlists-memories: preliminary work to handle ROM.	Tristan Gingold	2019-10-20	1	-111/+194
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*	synth: use note messages for memories (instead of warnings).	Tristan Gingold	2019-10-19	1	-27/+21
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*	netlists-memories: check ports.	Tristan Gingold	2019-10-18	1	-7/+161
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*	synth: add netlists-memories to extract memories. Still WIP.	Tristan Gingold	2019-10-17	1	-0/+500