| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth: handle reuse of inferred dff in the same process. | Tristan Gingold | 2020-03-22 | 1 | -10/+37 |
| | | | | | Fix tgingold/ghdlsynth-beta#93 | ||||
| * | synth: refactoring inference (WIP). | Tristan Gingold | 2020-03-15 | 1 | -23/+18 |
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| * | synthesis: handle initialized output ports. | Tristan Gingold | 2020-03-07 | 1 | -6/+8 |
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| * | netlists-inference: preliminary work to support else in synch code. | Tristan Gingold | 2020-02-20 | 1 | -71/+153 |
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| * | synth: add mdff. | Tristan Gingold | 2020-02-17 | 1 | -10/+44 |
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| * | netlists-inference: remove useless code. | Tristan Gingold | 2020-02-16 | 1 | -10/+0 |
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| * | synthesis: rework memory inference. | Tristan Gingold | 2020-02-16 | 1 | -9/+10 |
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| * | synth: rework (again) memory inference. | Tristan Gingold | 2020-02-10 | 1 | -0/+694 |
| Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference. | |||||
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index : iCE40/ghdl | |
| [no description] |
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