iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Makefile: Generate Param_Pval_* in ghdlsynth_gates.h	Tristan Gingold	2020-03-31	1	-0/+10
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*	synth: preliminary work to export module parameters.	Tristan Gingold	2020-03-31	1	-1/+2
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*	synth: preliminary support of multiport rams (using shared variable).	Tristan Gingold	2020-03-28	1	-0/+1
\| \| \| \|	For #1069
*	testsuite/synth: add a test for #1166	Tristan Gingold	2020-03-23	1	-0/+1
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*	netlists: add id_nop gate.	Tristan Gingold	2020-03-22	1	-0/+1
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*	synth: handle numeric_std minimum/maximum. Fix #1168	Tristan Gingold	2020-03-21	1	-44/+48
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*	synthesis: handle initialized output ports.	Tristan Gingold	2020-03-07	1	-7/+8
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*	netlists: rework memories to fix port orders, add a loop.	Tristan Gingold	2020-02-23	1	-0/+2
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*	synth: add id_abs gate. For #1101	Tristan Gingold	2020-01-20	1	-7/+8
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*	netlists: add dyn_insert_en gate.	Tristan Gingold	2019-11-11	1	-17/+18
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*	ghdlsynth_gates.h: regenerate.	Tristan Gingold	2019-10-31	1	-0/+4
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*	Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-10-21	1	-0/+1
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*	Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-10-18	1	-0/+5
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*	synth: regenerate ghdlsynth_gates.h	Tristan Gingold	2019-10-03	1	-1/+1
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*	synth: replace memidx2 by addidx; handle some 2d arrays.	Tristan Gingold	2019-10-03	1	-1/+1
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*	netlists: add memidx1 and memidx2 gates.	Tristan Gingold	2019-10-02	1	-4/+6
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*	Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-10-02	1	-19/+24
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*	synth: Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-09-23	1	-25/+26
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*	synth: Add support for PSL cover directive (#930)	T. Meissner	2019-09-19	1	-0/+1
\| \| \| \| \| \|	* synth: Add support for PSL cover directive * testsuite/synth: Add tests for PSL cover directives
*	synth: handle unsigned shift left.	Tristan Gingold	2019-09-11	1	-50/+52
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*	synth: add const_sb32, add smul/umul.	Tristan Gingold	2019-09-07	1	-2/+3
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*	synth: remove unused const gates.	Tristan Gingold	2019-08-30	1	-6/+3
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*	synth: regenerate ghdlsynth_gates.h	Tristan Gingold	2019-07-31	1	-3/+4
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*	add port width utility function for yosys (#876)	Pepijn de Vos	2019-07-21	1	-0/+3
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*	synth: add > and >= operators (#870)	Pepijn de Vos	2019-07-16	1	-23/+24
\| \| \| \| \| \|	* synth: add > and >= operators * synth: update ghdlsynth_gates.h
*	netlists: add assume gate.	Tristan Gingold	2019-07-04	1	-0/+1
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*	synth: handle concurrent assertions.	Tristan Gingold	2019-07-02	1	-0/+1
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*	ghdlsynth_gates.h: rebuild.	Tristan Gingold	2019-07-02	1	-29/+33
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*	Add netlist generation infrastructure.	Tristan Gingold	2017-01-31	1	-0/+60