iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	synth: create sub-instace for processes	Tristan Gingold	2023-01-20	1	-0/+5
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*	synth: add statement in context, adjust path/instance name attributes	Tristan Gingold	2022-12-31	1	-3/+26
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*	synth: handle instance_name attribute	Tristan Gingold	2022-12-26	1	-0/+3
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*	synth: add value_sig_val to handle individual signal associations	Tristan Gingold	2022-12-26	1	-0/+22
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*	synth: rename vhdl.annotations to elab.vhdl_annotations	Tristan Gingold	2022-09-19	1	-1/+1
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*	synth: use areapools	Tristan Gingold	2022-09-02	1	-1/+12
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*	elab-vhdl_context: add iterator for top-level packages	Tristan Gingold	2022-07-20	1	-0/+14
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*	synth: move procedure call copyback values in context	Tristan Gingold	2022-05-25	1	-2/+11
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*	elab-vhdl_context: remove cur_stmt from context	Tristan Gingold	2022-05-17	1	-7/+0
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*	elab-vhdl_values: rename signal_index to signal_index_type	Tristan Gingold	2022-05-15	1	-1/+1
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*	elab-vhdl_context: add get_instance_parent	Tristan Gingold	2022-05-14	1	-0/+4
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*	synth: add current_stmt, minor rework	Tristan Gingold	2022-05-09	1	-0/+8
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*	elab-vhdl_context: introduce signal_index	Tristan Gingold	2022-05-06	1	-0/+3
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*	synth: add debug_bt	Tristan Gingold	2022-03-08	1	-0/+10
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*	synth: add hooks to support elaboration of foreign instances	Tristan Gingold	2021-11-28	1	-0/+6
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*	synth: do full elaboration before synthesis	Tristan Gingold	2021-11-01	1	-0/+222