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* src: Adjust disp-rti for new PSL RTI type.Ondrej Ille2021-04-081-12/+27
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* update license headersumarcor2021-01-141-11/+9
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* grt: adjust previous patch on grt-wavesTristan Gingold2020-08-051-13/+0
| | | | Write bounds only when the element subtype of the base type is unbounded.
* grt: handle more unbounded types in disp_rti and ghw.Tristan Gingold2020-08-041-25/+76
| | | | Fix #1131
* grt-disp_signals: fix handling of unbounded aggregates.Tristan Gingold2020-08-041-1/+1
| | | | For #1420
* grt: fix crash in --dump-rti for array of unbounded records.Tristan Gingold2020-08-041-3/+1
| | | | For #1420
* grt: handle unbounded array subtype in rtis and wavesTristan Gingold2020-07-251-0/+22
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* grt: fix warnings from gnatgpl2020.Tristan Gingold2020-05-231-5/+5
| | | | Was actuals overlap.
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | * vhdl: make the parser understand PSL assume * assume does not actually have report according to the spec. Just a property. * add SPL assume to semantic analysis * canonicalise PSL assume * add assume to annotations * add PSL assume to simulation code * statement -> directive * add assume to translation files * update ticked24 testcase * correctly parse assume * add assume testcase * refactor chunk of duplicated code
* grt/rtis: fix use of bounds for unbounded subelements.Tristan Gingold2019-01-041-1/+4
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* Extract grt.astdio.vhdl from grt.astdio.Tristan Gingold2018-12-161-0/+1
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* grt rtis/wave: handle unbounded record subtypes.Tristan Gingold2018-10-211-3/+15
| | | | Fix #668
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-26/+50
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* rti: handle more unbounded recordTristan Gingold2017-11-011-2/+4
| | | | Fix #418
* ghwlib/grt-waves: handle unbounded records.Tristan Gingold2017-06-021-1/+2
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* rtis/vcd/ghw: handle record subtypes.Tristan Gingold2017-02-221-39/+2
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* unbounded records: add rti support (WIP)Tristan Gingold2017-02-211-121/+221
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* vhdl08: add support of case-generate statementTristan Gingold2016-07-071-3/+8
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* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-221-15/+39
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* PSL: add counters, generate rti and add --psl-reportTristan Gingold2016-03-181-6/+31
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* grt rtis_addr: handle B1 ranges.Tristan Gingold2016-01-251-5/+30
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* Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold2015-12-181-1/+6
| | | | Improve simulation speed by about 20%.
* grt: add --list-features, and --has-featureTristan Gingold2015-09-141-2/+3
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* grt-disp_rti: fix thinko (no blocks for if-generate).Tristan Gingold2015-01-151-2/+5
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* Handle vhdl08 if generate statementsTristan Gingold2015-01-071-31/+22
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* Rework for vhdl08 generate: change rtis.Tristan Gingold2015-01-041-15/+41
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* rtis: add source location for blocks and object. Use them in fst dumper.Tristan Gingold2014-12-131-0/+29
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* grt-disp_rti: disp alias kind.Tristan Gingold2014-12-101-4/+6
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* grt-disp_rti.adb: disp array of enum as strings (when possible).Tristan Gingold2014-12-101-40/+97
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* Move files and dirs from translate/Tristan Gingold2014-11-051-0/+1080