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* Adding some comments to the RTI processing. (#1304)Ben Reynwar2020-05-123-15/+73
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* doc: fix typos in 'internals' (#1305)Ben Reynwar2020-05-122-25/+25
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* Improve formatting of testenv.sh file. (#1301)m-kru2020-05-111-58/+58
| | | | Replace tabs with spaces. Unify indentation to 2 spaces.
* Constants in vpi (#1297)Ben Reynwar2020-05-1016-15/+524
| | | | | | | | | | | | | | | | | * Adding some very basic vpi tests. * Modify test so that's it's checking VPI access to constants. * Provide VPI to access constants. * Add vpi tests to testsuite. * Fix bug to allow getting values of generic/constant boolean and std_logic. * Fix stupid copying mistake in last commit. * Formatting and trying to get tests working on windows. * Fixing comment and removing redundant VhpiConstantDeclK
* testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#104Tristan Gingold2020-05-096-0/+149
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* synth_stmts: handle ranges in case. Fix ghdl/ghdl-yosys-plugin#104Tristan Gingold2020-05-091-9/+53
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* synth-stmts: refactoring for synth_choice.Tristan Gingold2020-05-091-85/+84
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* Add tests of synth/sim for #1292 and #1295tmeissner2020-05-096-0/+317
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* testsuite/synth: add a test for false latchTristan Gingold2020-05-092-0/+28
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* synth: correctly quote nets name in error messages.Tristan Gingold2020-05-094-10/+23
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* synth-stmts: use pmux to implement case statements.Tristan Gingold2020-05-092-130/+134
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* testsuite/synth: add case tests for corner case.Tristan Gingold2020-05-095-9/+85
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* netlists-builders: add Build_Pmux.Tristan Gingold2020-05-094-1/+67
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* testsuite/gna: add a test for #1292Tristan Gingold2020-05-092-0/+108
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* vhdl-sem_psl: handle next_event_a and next_event_e. Fix #1292Tristan Gingold2020-05-091-0/+5
| | | | From T. Meissner.
* netlists-gates: reserve pmux and latch.Tristan Gingold2020-05-092-93/+104
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* update README.mdeine2020-05-091-6/+6
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* doc: update Newseine2020-05-091-16/+30
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* update NEWS.mdeine2020-05-091-4/+8
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* testsuite/synth, testsuite/gna: add tests for ghdl#1288tmeissner2020-05-084-0/+147
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* Add handling of N_Next_E in PSL semantic passtmeissner2020-05-081-1/+1
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* doc: update 'Contributing' (add ref to wiki)"umarcor2020-05-081-16/+44
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* doc: update contributor roleumarcor2020-05-081-1/+1
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* doc: update date (year)umarcor2020-05-081-1/+1
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* doc: document option '--time-resolution'umarcor2020-05-081-0/+12
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* doc: document option '-o'umarcor2020-05-081-0/+5
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* doc: move 'examples/quick_start' to 'quick_start'umarcor2020-05-0811-4/+3
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* doc: move Documentation roadmap to the github wikiumarcor2020-05-081-14/+0
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* readme: minor fixumarcor2020-05-081-1/+1
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* doc: move roadmap and GSOCs to the github wiki.Tristan Gingold2020-05-083-139/+0
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* testsuite/synth: add test for ghdl/ghdl-yosys-plugin#111Tristan Gingold2020-05-073-0/+118
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* synth: handle vhdl-08 ports. Fix ghdl/ghdl-yosys-plugin#111Tristan Gingold2020-05-073-16/+36
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* testsuite/synth: add a test for nested memories.Tristan Gingold2020-05-073-1/+88
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* synth-stmts: improve support of nested memories.Tristan Gingold2020-05-071-4/+5
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* testsuite/synth: add a test for previous commit.Tristan Gingold2020-05-072-1/+49
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* synth: handle Pos attribute for booleans.Tristan Gingold2020-05-072-1/+2
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* synth: revert a previous commit: remove the En parameter.Tristan Gingold2020-05-0612-311/+226
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* testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#115Tristan Gingold2020-05-063-0/+82
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* synth-expr.adb: handle negative values. Fix ghdl/ghdl-yosys-plugin#115Tristan Gingold2020-05-061-2/+18
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* testsuite/synth: add more tests for #1273Tristan Gingold2020-05-069-4/+238
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* synth: add support for sequential assertions. Fix #1273Tristan Gingold2020-05-066-58/+312
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* netlists-folds: add Build2_And, remove default location.Tristan Gingold2020-05-063-13/+29
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* synth: add Id_Enable gate (for sequential assertions).Tristan Gingold2020-05-065-0/+25
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* testsuite/synth: add a test for #1282Tristan Gingold2020-05-052-0/+22
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* vhdl-sem_expr: improve support of vhdl-08 aggregates. Fix #1282Tristan Gingold2020-05-051-24/+37
| | | | An element of an aggregate may have an unconstrained length.
* synth: revert part of sequential assertion support. Fix #1285Tristan Gingold2020-05-052-81/+20
| | | | | The idea of adding conditions to the sequential flow is incorrect. Need to add wires.
* testsuite/synth: add test from #1283Tristan Gingold2020-05-055-0/+81
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* synth: initial support of unbounded records. Fix #1283Tristan Gingold2020-05-057-11/+40
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* synth-aggre: propagate errors in record aggregate. Fix #1283Tristan Gingold2020-05-051-6/+14
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* vhdl-evaluation: handle record equality. For #1283Tristan Gingold2020-05-051-5/+127
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