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* | synth-vhdl_eval: handle more operationsTristan Gingold2022-06-052-37/+112
* | vhdl: recognize more predefined ieee functions and operatorsTristan Gingold2022-06-055-465/+593
* | synth-vhdl_eval: handle more operations (sgn/uns reduce)Tristan Gingold2022-06-051-6/+16
* | synth-vhdl-eval: handle more operationsTristan Gingold2022-06-054-31/+272
* | vhdl-ieee-numeric: recognize vector/scalar operationsTristan Gingold2022-06-053-296/+368
* | testsuite/synth: add a test for #2074Tristan Gingold2022-06-052-0/+25
* | synth-vhdl_oper: handle more bit_vector operations. Fix #2074Tristan Gingold2022-06-051-8/+13
* | elab-debugger: add where commandTristan Gingold2022-06-051-28/+49
* | synth-vhdl_eval: handle rotations and shift for numeric_stdTristan Gingold2022-06-051-4/+40
* | synth-vhdl_eval: handle to_x01, to_ux01, to_x01z and is_xTristan Gingold2022-06-052-19/+56
* | vhdl-ieee-numeric: recognize is_x, to_x01, to_ux01 and to_x01zTristan Gingold2022-06-053-234/+284
* | synth-vhdl_eval: handle more operationsTristan Gingold2022-06-053-2/+41
* | synth-ieee-numeric_std: fix handling of X for negationTristan Gingold2022-06-051-18/+20
* | synth-vhdl_eval: handle find_leftmost and find_rightmostTristan Gingold2022-06-053-0/+55
* | testsuite/synth: add a test for #2073Tristan Gingold2022-06-054-0/+185
* | synth-vhdl_expr: adjust max computation for memidx. Fix #2073Tristan Gingold2022-06-052-3/+3
* | pyGHDL/lsp: reformatTristan Gingold2022-06-041-3/+1
* | testsuite/synth: add a test for #2072Tristan Gingold2022-06-043-0/+80
* | synth-vhdl_decls: fix subtype conversion for variable default value.Tristan Gingold2022-06-041-1/+1
* | synth-vhdl_eval: handle minmaxTristan Gingold2022-06-043-178/+295
* | pyGHDL/lsp: enable warning for unassociated portsTristan Gingold2022-06-041-0/+1
* | vhdl: add a warning for unassociated portsTristan Gingold2022-06-045-13/+31
* | pyGHDL/lsp: handle goto-reference on records elementsTristan Gingold2022-06-041-1/+3
* | testsuite/gna: add a test for previous commitTristan Gingold2022-06-042-0/+12
* | vhdl-sem_types: avoid a crash on empty records if forced analysisTristan Gingold2022-06-041-1/+9
* | synth-vhdl_expr: do not abort on array subtype conversionTristan Gingold2022-06-042-1/+6
* | vhdl-sem_scopes: handle state_suspendTristan Gingold2022-06-041-1/+2
* | elab-vhdl_debug: add print commandTristan Gingold2022-06-044-2/+306
* | synth-vhdl_eval: handle more operators (nand, nor, xnor)Tristan Gingold2022-06-042-0/+54
* | synth-vhdl_eval: add support for more operators.Tristan Gingold2022-06-043-24/+121
* | synth-vhdl_eval: handle rotationsTristan Gingold2022-06-043-1/+55
* | elab-vhdl_types: handle array attributes on function callTristan Gingold2022-06-042-0/+9
* | synth-vhdl_eval: handle more operations, fix resize corner caseTristan Gingold2022-06-032-24/+74
* | synth-vhdl_eval: handle more operationsTristan Gingold2022-06-033-4/+384
* | elab-debugger: remove duplicate flagTristan Gingold2022-06-035-10/+11
* | areapools: avoid a crash on release with empty blockTristan Gingold2022-06-031-0/+1
* | synth: handle file flush procedureTristan Gingold2022-06-013-0/+18
* | vhdl-ieee-std_logic_1164: recognize to_hstring, to_ostringTristan Gingold2022-06-013-424/+433
* | testsuite/gna: add tests for #2070Tristan Gingold2022-06-0163-0/+272
* | vhdl-utils(is_copyback_parameter): avoid a crash on file parameterTristan Gingold2022-06-011-6/+2
* | vhdl: improve use of interface types. For #2070Tristan Gingold2022-06-012-0/+6
* | vhdl-scanner: adjust assertion. For #2070Tristan Gingold2022-06-011-1/+1
* | vhdl-parse: do not allow nested context declaration. For #2070Tristan Gingold2022-06-011-1/+5
* | vhdl-parse: avoid a crash on too large numbers. For #2070Tristan Gingold2022-06-012-2/+15
* | vhdl: avoid crash after an error. For #2070Tristan Gingold2022-06-013-3/+10
* | vhdl-evaluation.adb: avoid a crash on overflow. For #2070Tristan Gingold2022-06-011-11/+12
* | vhdl-errors.adb: use normal message subprogram. For #2070Tristan Gingold2022-06-011-9/+1
* | synth-vhdl_eval: complete vector reduce operationsTristan Gingold2022-05-311-7/+21
* | synth-vhdl_eval: handle shift and rotationsTristan Gingold2022-05-311-6/+29
* | synth-vhdl_eval: handle vector match, numeric_bit.to_unsignedTristan Gingold2022-05-312-7/+73
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