| Commit message (Expand) | Author | Age | Files | Lines |
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* | testsuite/synth: adjust test after previous commit | Tristan Gingold | 2021-11-12 | 4 | -2/+20 |
* | synth: do not display black boxes | Tristan Gingold | 2021-11-12 | 1 | -1/+6 |
* | std_names: add syn_black_box | Tristan Gingold | 2021-11-12 | 3 | -182/+185 |
* | testsuite/synth: add tests for rol/ror. For #1909 | Tristan Gingold | 2021-11-11 | 5 | -1/+85 |
* | synth: also handle rol. For #1909 | Tristan Gingold | 2021-11-11 | 1 | -0/+5 |
* | testsuite/synth: add a test for #1909 | Tristan Gingold | 2021-11-11 | 3 | -0/+67 |
* | synth: handle ror from numeric_std. Fix #1909 | Tristan Gingold | 2021-11-11 | 1 | -1/+4 |
* | vhdl: recognize ror/rol from ieee.numeric_std. For #1909 | Tristan Gingold | 2021-11-11 | 3 | -284/+304 |
* | pyGHDL: regenerate nodes.py | Tristan Gingold | 2021-11-10 | 1 | -309/+311 |
* | vhdl: Iir_Kind_Foreign_Module is now a library unit | Tristan Gingold | 2021-11-09 | 24 | -667/+730 |
* | lists: add a subtype for valid lists | Tristan Gingold | 2021-11-09 | 2 | -2/+4 |
* | testsuite/gna: add a test for #1908 | Tristan Gingold | 2021-11-05 | 5 | -0/+573 |
* | ghdlcomp: exit with error status in case of error. For #1908 | Tristan Gingold | 2021-11-05 | 1 | -0/+4 |
* | vhdl-configuration: stop earlier in case of error. Fix #1908 | Tristan Gingold | 2021-11-05 | 1 | -17/+19 |
* | testsuite/synth: add a test for #1899 | Tristan Gingold | 2021-11-05 | 2 | -0/+95 |
* | vhdl/psl: handle PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-05 | 8 | -64/+143 |
* | scripts/pnodes.py: add a comment | Tristan Gingold | 2021-11-05 | 1 | -0/+3 |
* | vhdl: parse PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-04 | 11 | -739/+800 |
* | vhdl: add tok_inherit. Preliminary work for #1899 | Tristan Gingold | 2021-11-03 | 7 | -740/+747 |
* | testsuite/gna: add a test for #1898 | Tristan Gingold | 2021-11-03 | 5 | -0/+50 |
* | trans-chap7: convert to base type for array-element operation. For #1898 | Tristan Gingold | 2021-11-03 | 1 | -3/+5 |
* | ci: simplify MSYS2 matrices using 'pacboy' | umarcor | 2021-11-03 | 1 | -44/+42 |
* | synth: Support alias declarations in vunit | tmeissner | 2021-11-02 | 9 | -8/+55 |
* | synth: do full elaboration before synthesis | Tristan Gingold | 2021-11-01 | 61 | -2038/+5349 |
* | testsuite/gna/issue1069: improve harness | Tristan Gingold | 2021-11-01 | 1 | -1/+1 |
* | vhdl: also warns on unused enumeration literal | Tristan Gingold | 2021-11-01 | 5 | -219/+256 |
* | pyGHDL/cli/lsp.py: fix --disp-config | Tristan Gingold | 2021-11-01 | 1 | -0/+2 |
* | testsuite/synth: add a test for #1903 | Tristan Gingold | 2021-10-29 | 2 | -0/+30 |
* | synth: reject wait statement. Fix #1903 | Tristan Gingold | 2021-10-29 | 1 | -0/+3 |
* | testsuite/gna: add a test for #1897 | Tristan Gingold | 2021-10-19 | 4 | -0/+253 |
* | vhdl-configuration.adb: avoid a crash in case of error. Fix #1897 | Tristan Gingold | 2021-10-18 | 1 | -2/+11 |
* | testsuite/synth: add a test for #1896 | Tristan Gingold | 2021-10-18 | 3 | -1/+44 |
* | synth-static_oper: handle or/and reduce operators for unsigned. Fix #1896 | Tristan Gingold | 2021-10-18 | 1 | -1/+5 |
* | ortho/debug and ortho/oread: also increase identifier buffers. For #1894 | Tristan Gingold | 2021-10-18 | 2 | -2/+2 |
* | CI: Add UCRT64 jobs and generate artifacts/assets | Patrick Lehmann | 2021-10-17 | 1 | -46/+56 |
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| * | ci: cleanup job names | umarcor | 2021-10-17 | 1 | -7/+7 |
| * | ci: add UCRT64 jobs and generate artifacts/assets | umarcor | 2021-10-17 | 1 | -43/+53 |
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* | ci: bump Python to 3.10 when using Action setup-python | umarcor | 2021-10-17 | 1 | -3/+3 |
* | testsuite/gna: add a test for #1894 | Tristan Gingold | 2021-10-16 | 2 | -0/+21 |
* | trans.adb: increased maximum identifier length. Fix #1894 | Tristan Gingold | 2021-10-16 | 1 | -1/+1 |
* | configure: blindly allow llvm 13 | Tristan Gingold | 2021-10-15 | 1 | -0/+1 |
* | Add test for PSL declarations in inline PSL | tmeissner | 2021-10-14 | 3 | -1/+63 |
* | synth: Support PSL declarations in inline PSL | tmeissner | 2021-10-14 | 1 | -1/+2 |
* | testsuite/synth: add a test for #1889 | Tristan Gingold | 2021-10-13 | 3 | -0/+42 |
* | synth: add support for sequence instance in vunit. Fix #1889 | Tristan Gingold | 2021-10-13 | 5 | -4/+12 |
* | testsuite/synth: add one more test for #1886 | Tristan Gingold | 2021-10-10 | 1 | -1/+1 |
* | synth-vhdl_expr.adb: handle more dynamic slice cases. Fix #1886 | Tristan Gingold | 2021-10-10 | 1 | -42/+74 |
* | testsuite/synth: add a test for #1886 | Tristan Gingold | 2021-10-09 | 7 | -0/+193 |
* | synth-vhdl_expr: fix handling of negative factor in slice. For #1886 | Tristan Gingold | 2021-10-09 | 1 | -25/+61 |
* | synth-vhdl_decls.adb: also detect unassigned variables. | Tristan Gingold | 2021-10-09 | 1 | -11/+4 |