iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	translate: minor reformating.	Tristan Gingold	2016-02-21	1	-24/+19
*	grt: remove rti field in signals (to reduce space).	Tristan Gingold	2016-02-21	3	-72/+5
*	ortho: rename start/finish_const_value to start/finish_init_value.	Tristan Gingold	2016-02-21	23	-158/+153
*	grt-backtraces-gcc: add pragma unreferenced.	Tristan Gingold	2016-02-21	1	-1/+4
*	trans-chap12: factorize code.	Tristan Gingold	2016-02-20	1	-9/+1
*	Refactoring in simulate in order to link with ortho.	Tristan Gingold	2016-02-20	18	-1218/+1313
*	parse: detect early use of signature in expressions.	Tristan Gingold	2016-02-18	1	-1/+8
*	parse: avoid weird error message for end protected.	Tristan Gingold	2016-02-17	1	-1/+8
*	Reproducer of ticket97 is in fact invalid.	Tristan Gingold	2016-02-17	1	-2/+1
*	Add issue40 testcase.	Tristan Gingold	2016-02-17	3	-0/+81
*	assocations: check rules for unconstrained formal (LRM08 5.3.2.2 e 3)	Tristan Gingold	2016-02-17	2	-4/+39
*	Add testcase for isse43.	Tristan Gingold	2016-02-17	5	-0/+135
*	Tentative fix for issue43.	Tristan Gingold	2016-02-17	1	-1/+1
*	Add testcase for issue42.	Tristan Gingold	2016-02-17	2	-0/+91
*	Fix crash of issue42.	Tristan Gingold	2016-02-17	1	-1/+2
*	simul debugger: add info instances	Tristan Gingold	2016-02-17	2	-3/+46
*	mcode: init support for initialized variables.	Tristan Gingold	2016-02-17	9	-38/+107
*	psl: cover directive works on a sequence, not on a property.	Tristan Gingold	2016-02-17	1	-2/+0
*	PSL: move canon code to canon.adb	Tristan Gingold	2016-02-17	1	-0/+2
*	simul: fix local protected object, boolean for-generate loop	Tristan Gingold	2016-02-14	3	-38/+51
*	simul debugger: handle more concurrent statements.	Tristan Gingold	2016-02-14	1	-0/+50
*	ghdl --lines: fix incorrect conversion.	Tristan Gingold	2016-02-14	1	-1/+5
*	simul: more fixes for std_ulogic.	Tristan Gingold	2016-02-14	3	-18/+30
*	Rewrite cover tests.	Tristan Gingold	2016-02-14	7	-5/+189
*	psl: cover directive works on a sequence, not on a property.	Tristan Gingold	2016-02-14	20	-86/+307
*	simul: preliminary work to support PSL.	Tristan Gingold	2016-02-14	7	-105/+323
*	PSL: move canon code to canon.adb	Tristan Gingold	2016-02-14	7	-135/+308
*	simul: return the exit status set by std.env	Tristan Gingold	2016-02-14	2	-2/+6
*	simul: check for no unconstrained port/generic of top-level entity.	Tristan Gingold	2016-02-14	2	-1/+30
*	Add testcase for 'value	Tristan Gingold	2016-02-10	2	-0/+26
*	simul: make delayed signal elaborated.	Tristan Gingold	2016-02-10	1	-0/+1
*	simul: add support of e8.	Tristan Gingold	2016-02-10	9	-170/+205
*	simul: handle generic override.	Tristan Gingold	2016-02-10	3	-20/+106
*	evaluation: handle whitespace for 'value.	Tristan Gingold	2016-02-10	3	-1/+54
*	build_enumeration_value: correctly handle characters.	Tristan Gingold	2016-02-10	1	-12/+22
*	simul: handle slice in individual association for subprograms.	Tristan Gingold	2016-02-10	1	-0/+11
*	simul: fix type conversion to unconstrained array.	Tristan Gingold	2016-02-10	1	-14/+35
*	simul: fix corner cases for image.	Tristan Gingold	2016-02-10	1	-100/+131
*	simul: fix issue14.	Tristan Gingold	2016-02-10	1	-10/+21
*	simul: fix elaboration check for implicit signals.	Tristan Gingold	2016-02-10	1	-0/+1
*	testsuite: check feature before testing it.	Tristan Gingold	2016-02-09	12	-11/+49
*	simul: fix individual association for array.	Tristan Gingold	2016-02-09	1	-3/+4
*	simul: add missing canon.	Tristan Gingold	2016-02-09	1	-3/+3
*	simul: exit with the right status for --has-feature.	Tristan Gingold	2016-02-09	1	-2/+11
*	simul: avoid stupid crashes in debugger.	Tristan Gingold	2016-02-09	1	-2/+10
*	PSL: handle and/or in boolean assertion.	Tristan Gingold	2016-02-09	3	-19/+66
*	bug037: add initial testcase.	Tristan Gingold	2016-02-09	16	-0/+6808
*	Improve mixed dump of PSL and VHDL nodes.	Tristan Gingold	2016-02-09	4	-32/+24
*	A subtype of a resolved array type is resolved.	Tristan Gingold	2016-02-06	1	-0/+3
*	simul: handle vhdl 2008.	Tristan Gingold	2016-02-06	10	-164/+358