| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | netlists-disp_vhdl: factorize code, improve handling of 'Z'. | Tristan Gingold | 2020-04-06 | 1 | -16/+8 |
| * | grt-types: declare ghdl_u8. | Tristan Gingold | 2020-04-06 | 1 | -1/+2 |
| * | vhdl: add scalar_size. Size of scalar types is computed during analysis. | Tristan Gingold | 2020-04-06 | 17 | -393/+559 |
| * | Move Size_Type from areapools to types. | Tristan Gingold | 2020-04-06 | 2 | -5/+7 |
| * | grt/ghdl_main: add comments. | Tristan Gingold | 2020-04-06 | 1 | -0/+7 |
| * | Add compatibility with LLVM-10. (#1192) | Björn Esser | 2020-04-06 | 2 | -8/+9 |
| * | grt: slightly simplify the interface. | Tristan Gingold | 2020-04-02 | 4 | -21/+7 |
| * | Remove deprecated src/mhdlsim | Tristan Gingold | 2020-04-02 | 3 | -135/+0 |
| * | grt: add code to support systemc co-simulation. | Tristan Gingold | 2020-04-02 | 10 | -48/+147 |
| * | synth: more cleanup (and use of valtyp). | Tristan Gingold | 2020-04-02 | 14 | -391/+358 |
| * | testsuite/synth: add a test for #1186 | Tristan Gingold | 2020-04-02 | 2 | -0/+23 |
| * | synth: handle reals in parameters. Fix #1186 | Tristan Gingold | 2020-04-02 | 1 | -12/+25 |
| * | synth: rework - use valtyp for expressions. | Tristan Gingold | 2020-04-02 | 19 | -933/+1029 |
| * | testsuite/synth: use harness. | Tristan Gingold | 2020-04-01 | 1 | -11/+1 |
| * | synth: use more Dim_Type. | Tristan Gingold | 2020-04-01 | 6 | -26/+27 |
| * | testsuite/synth: add a test for #1179 | Tristan Gingold | 2020-04-01 | 2 | -0/+26 |
| * | synth-static_oper: handle mul nat uns. Fix #1179 | Tristan Gingold | 2020-04-01 | 4 | -0/+47 |
| * | testsuite/synth: add test for #1180 | Tristan Gingold | 2020-04-01 | 2 | -0/+41 |
| * | synth: handle low/high type attributes. Fix #1180 | Tristan Gingold | 2020-04-01 | 1 | -0/+22 |
| * | vhdl-sem: add a todo note. | Tristan Gingold | 2020-03-31 | 1 | -0/+1 |
| * | vhdl-sem_assocs: report all errors on incorrect formals. | Tristan Gingold | 2020-03-31 | 1 | -1/+1 |
| * | netlists: add new helpers for yosys plugin. | Tristan Gingold | 2020-03-31 | 3 | -3/+27 |
| * | synth-insts: keep module/generics/ports case for blackboxes. | Tristan Gingold | 2020-03-31 | 1 | -23/+52 |
| * | netlists-disp_vhdl: display generics. | Tristan Gingold | 2020-03-31 | 1 | -0/+25 |
| * | Makefile: Generate Param_Pval_* in ghdlsynth_gates.h | Tristan Gingold | 2020-03-31 | 3 | -1/+22 |
| * | synth: preliminary work to export module parameters. | Tristan Gingold | 2020-03-31 | 9 | -26/+321 |
| * | options: handle -fmax-errors= | Tristan Gingold | 2020-03-31 | 2 | -1/+9 |
| * | netlists-disp_vhdl: fix typos. | Tristan Gingold | 2020-03-31 | 1 | -2/+2 |
| * | python: fix document URI creation on Windows (#1183) | Maximilian Köstler | 2020-03-31 | 1 | -1/+1 |
| * | testsuite/synth: add test for #1178 | Tristan Gingold | 2020-03-30 | 2 | -0/+23 |
| * | synth: improve support of vhdl2008 aggregate targets. Fix #1178 | Tristan Gingold | 2020-03-30 | 3 | -53/+72 |
| * | testsuite/synth: add tests for #1177 | Tristan Gingold | 2020-03-30 | 3 | -0/+40 |
| * | synth: improve support of conditionnal operator. Fix #1177 | Tristan Gingold | 2020-03-30 | 1 | -1/+4 |
| * | synth: add helper to support inout ports in yosys plugin. For #1166 | Tristan Gingold | 2020-03-29 | 3 | -0/+18 |
| * | synth: improve output of memory initial value. | Tristan Gingold | 2020-03-29 | 4 | -9/+82 |
| * | synth: add one more operation (or_reduce for suv). | Tristan Gingold | 2020-03-29 | 1 | -1/+2 |
| * | testsuite/synth: add tests for #1175 | Tristan Gingold | 2020-03-29 | 4 | -0/+51 |
| * | synth: fix handling of subtype indication in object aliases for vhdl 2008. | Tristan Gingold | 2020-03-29 | 2 | -5/+12 |
| * | testsuite/synth: add testcase for previous commit. | Tristan Gingold | 2020-03-28 | 2 | -1/+20 |
| * | synth: handle or_reduce from std_logic_misc. | Tristan Gingold | 2020-03-28 | 1 | -16/+10 |
| * | vhdl: recognize reduce functions in std_logic_misc. | Tristan Gingold | 2020-03-28 | 5 | -1/+154 |
| * | synth-static_oper: add more operation. | Tristan Gingold | 2020-03-28 | 1 | -0/+8 |
| * | netlists-memories: add flag_memory_verbose | Tristan Gingold | 2020-03-28 | 1 | -2/+7 |
| * | synth-oper: handle to_integer for signed. | Tristan Gingold | 2020-03-28 | 1 | -0/+9 |
| * | synth: remove useless note message. | Tristan Gingold | 2020-03-28 | 1 | -2/+5 |
| * | testsuite/synth: add testcase for #1069 | Tristan Gingold | 2020-03-28 | 9 | -0/+611 |
| * | synth: do not emit warning for unassigned but unused signals. | Tristan Gingold | 2020-03-28 | 1 | -5/+11 |
| * | libraries/ieee: reimport std_logic_1164 from vhdl 2019 | Tristan Gingold | 2020-03-28 | 2 | -946/+1008 |
| * | netlists-dump: improve output. | Tristan Gingold | 2020-03-28 | 1 | -6/+12 |
| * | synth: preliminary support of multiport rams (using shared variable). | Tristan Gingold | 2020-03-28 | 6 | -333/+648 |
