iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Better type handling.	Patrick Lehmann	2021-06-23	4	-16/+94
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*	Formatted pyunit tests via black.	Patrick Lehmann	2021-06-23	7	-273/+297
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*	pyGHDL: handle requirements files with comments and/or git URLs	Patrick Lehmann	2021-06-23	1	-68/+91
\| \| \| \|	(cherry picked from commit 8bb020fb4481e1d21ccf64470ddf1838024732cb)
*	Changed translate functions retuning lists to generators.	Patrick Lehmann	2021-06-23	1	-35/+32
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*	Handle shared variables.	Patrick Lehmann	2021-06-22	4	-3/+59
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*	Renamed AllVHDLSources to Sanity.	Patrick Lehmann	2021-06-22	8	-24/+215
\| \| \| \| \|	Improved glob in Sanity check. Bound requirement for pyVHDLModel to Git branch.
*	Report file and line of an error reported by libghdl.	Patrick Lehmann	2021-06-22	1	-4/+13
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*	Improved error handling.	Patrick Lehmann	2021-06-22	5	-26/+56
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*	Prepared for DeferredConstant.	Patrick Lehmann	2021-06-22	4	-15/+38
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*	Code cleanups.	Patrick Lehmann	2021-06-22	3	-88/+42
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*	Fix Codacy issues	Patrick Lehmann	2021-06-22	17	-450/+729
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\| *	scripts/pnodespy: cleaner print_file_header	Patrick Lehmann	2021-06-22	2	-14/+5
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\| *	pyGHDL/dom/NonStandard: one-line docstring	umarcor	2021-06-22	1	-3/+1
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\| *	scripts/pnodespy: 's/includeIntEnumunique/includeIntEnumUnique/'	umarcor	2021-06-22	1	-3/+3
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\| *	libraries: run black	umarcor	2021-06-22	2	-360/+662
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\| *	fix issues reported by Codacy	umarcor	2021-06-22	17	-93/+81
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* \|	pyGHDL/dom/_Utils.py: add assert, adjust previous commit	Tristan Gingold	2021-06-22	3	-2/+4
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*	nodes.py: add an assertion on Get_Kind	Tristan Gingold	2021-06-22	2	-2/+2
\| \| \| \|	This function is the most likely to be called on a Null_Iir node.
*	vhdl/Makefile: use python3 by default	Tristan Gingold	2021-06-22	1	-1/+1
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*	Merge pull request #1801 from umarcor/py-dom-entrypoint	tgingold	2021-06-22	2	-12/+30
\|\ \| \| \| \|	pyGHDL: add ghdl-dom entrypoint
\| *	pyGHDL/cli/DOM: handle multiple exception types	umarcor	2021-06-22	1	-9/+26
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\| *	pyGHDL: add ghdl-dom entrypoint	umarcor	2021-06-22	2	-3/+4
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*	More expression kinds and function calls (#1802)	Unai Martinez-Corral	2021-06-22	20	-272/+958
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\| *	Fixed issues reported by Codacy.	Patrick Lehmann	2021-06-22	6	-20/+14
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\| *	Fixed filename in error messages.	Patrick Lehmann	2021-06-22	1	-1/+1
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\| *	Implemented handling of generic parameters to subprograms.	Patrick Lehmann	2021-06-22	5	-20/+178
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\| *	Print position where exception happened.	Patrick Lehmann	2021-06-22	4	-35/+110
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\| *	Fixed function call parameters.	Patrick Lehmann	2021-06-22	5	-6/+37
\| \| \| \| \| \| \| \| \| \|	Fixed physical literal units. Added basic Procedure detection.
\| *	Incremented dependency to pyVHDLModel to v0.10.2.	Patrick Lehmann	2021-06-22	1	-1/+1
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\| *	Handle Physical...Literals	Patrick Lehmann	2021-06-22	4	-12/+46
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\| *	Handle component declarations.	Patrick Lehmann	2021-06-22	4	-24/+68
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\| *	Prepared handling of functions, types, subtypes and aliases.	Patrick Lehmann	2021-06-22	11	-135/+296
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\| *	Minimal handling of types and subtypes.	Patrick Lehmann	2021-06-22	5	-23/+94
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\| *	Asked black for his opinion.	Patrick Lehmann	2021-06-22	2	-7/+33
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\| *	Start handling function calls.	Patrick Lehmann	2021-06-22	3	-9/+37
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\| *	Renamed 'NodeToName' to 'GetNameOfNode'.	Patrick Lehmann	2021-06-22	6	-24/+24
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\| *	Handle more expressions (logical, compare, rem/mod).	Patrick Lehmann	2021-06-22	2	-19/+71
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\| *	Handle OthersAggregateElement properly.	Patrick Lehmann	2021-06-22	1	-6/+3
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\| *	Added concatenation and string literal.	Patrick Lehmann	2021-06-22	3	-27/+42
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\| *	New testing file.	Patrick Lehmann	2021-06-22	2	-3/+3
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*	pyGHDL: pin pyVHDLModel	umarcor	2021-06-22	1	-1/+1
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*	testsuite/gna/testsuite.py: add --jobs option	Tristan Gingold	2021-06-22	1	-0/+3
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*	testsuite/pyunit/dom: test only vhdl source files from sanity/	Tristan Gingold	2021-06-22	1	-1/+1
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*	testsuite/synth: more checks of inferred memories	Tristan Gingold	2021-06-22	2	-6/+8
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*	synth-vhdl_stmts: add location on Addidx	Tristan Gingold	2021-06-21	1	-0/+2
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*	testsuite/synth: check ram in mem01 and mem02	Tristan Gingold	2021-06-21	10	-28/+34
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*	synth-environment: early transformation of dyn_insert to dyn_insert_en	Tristan Gingold	2021-06-21	4	-25/+59
\| \| \| \|	Simplifies memory extraction
*	synth-vhdl_stmts: merge static extract before dyn_extract.	Tristan Gingold	2021-06-21	1	-4/+2
\| \| \| \|	No reasons to use an extra gate.
*	synth-vhdl_expr: adjust width of memidx for indexed names.	Tristan Gingold	2021-06-21	1	-1/+1
\| \| \| \|	In general the width of memidx is ignored, but it's better to correctly set it
*	Merge pull request #1798 from Paebbels/paebbels/aggregates	tgingold	2021-06-20	22	-1681/+3530
\|\ \| \| \| \|	Python-C/Ada Bindings - Updated decorator