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* trans-chap7: handle concat of unbounded elements. Fix #2055Tristan Gingold2022-08-111-33/+58
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* testsuite/gna: add a test for element attributeTristan Gingold2022-08-102-0/+26
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* vhdl-sem_names: factorize code for element attributeTristan Gingold2022-08-101-56/+10
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* testsuite/gna: add a reproducer for #2166Tristan Gingold2022-08-1013-0/+873
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* trans: rework aggregate. For #2166Tristan Gingold2022-08-103-58/+65
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* vhdl: add Determined_Aggregate_Flag field. For #2166Tristan Gingold2022-08-107-197/+260
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* testsuite/synth: add a test for #2169Tristan Gingold2022-08-105-0/+103
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* synth-vhdl_oper.adb: fix mul uns uns. Fix #2169Tristan Gingold2022-08-101-1/+1
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* Resolve crashes caused by inconsistent capitalization on Windows (fix issue ↵Farmadupe2022-08-081-14/+29
| | | | | | | | #2036) (#2168) * Resolve crashes caused by inconsistent capitalization on Windows * Remove quotation in normalized paths. Also use pathlib to simplify pathification Co-authored-by: Thomas Green <none>
* Document changes to -frelaxed from #2165 (#2167)Farmadupe2022-08-071-0/+4
| | | Co-authored-by: Thomas Green <none>
* vhdl: add an owner to interface type definitionTristan Gingold2022-08-079-471/+538
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* testsuite/gna: adjust testsTristan Gingold2022-08-072-0/+2
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* testsuite/gna: add a test for #2155Tristan Gingold2022-08-074-0/+46
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* vhdl-sem_names.adb(are_types_closely_related): handle vhdl08 definitionTristan Gingold2022-08-071-14/+24
| | | | Fix #2155
* testsuite/gna: add a test for #2165Tristan Gingold2022-08-072-0/+26
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* vhdl-sem.adb: lexical conformance is now a relaxed error. Fix #2165Tristan Gingold2022-08-072-2/+7
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* testsuite/gna: add a test for #2164Tristan Gingold2022-08-072-0/+23
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* vhdl-sem.adb(are_trees_equal): handle qualified expressions. Fix #2164Tristan Gingold2022-08-071-1/+2
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* vhdl-sem_assocs: add commentsTristan Gingold2022-08-071-0/+7
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* vhdl-prints: handle default in interface subprogramTristan Gingold2022-08-071-1/+19
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* testsuite/gna: add a reproducer for #2163Tristan Gingold2022-08-075-0/+116
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* vhdl: add support for default in interface subprogram. Fix #2163Tristan Gingold2022-08-0714-746/+1016
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* testsuite/gna: add a test for #2156Tristan Gingold2022-08-074-0/+130
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* testsuite/gna: add a test for #2162Tristan Gingold2022-08-072-0/+42
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* PSL: Add handling of N_HDL_Bool to Dump_Expr procedure (#2158)T. Meissner2022-08-041-1/+2
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* testsuite/synth: add a test for #2159Tristan Gingold2022-08-042-0/+29
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* synth-vhdl_oper: remove check for positive rotation amount. Fix #2159Tristan Gingold2022-08-041-3/+1
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* vhdl-prints.adb: avoid crash on PSL endpointsTristan Gingold2022-08-041-3/+12
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* trans-chap9.adb: destroy types in PSL expressions. For #2157Tristan Gingold2022-08-041-3/+31
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* vhdl-prints: improve outputTristan Gingold2022-08-032-2/+23
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* testsuite/gna: add a test for #2157Tristan Gingold2022-08-035-0/+386
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* psl-build.adb: disable incorrect optimization. Fix #2157Tristan Gingold2022-08-032-2/+5
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* testsuite/gna: add a test for #2152Tristan Gingold2022-07-304-0/+49
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* trans-chap3: translate subtype indication of access subtype. Fix #2152Tristan Gingold2022-07-301-3/+14
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* psl-nodes: add commentsTristan Gingold2022-07-301-0/+2
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* testsuite/synth: adjust harness for #2144Tristan Gingold2022-07-301-1/+3
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* testsuite/gna: add a test for #2153Tristan Gingold2022-07-292-0/+132
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* psl-rewrites.adb: fix inclusive before. Fix #2153Tristan Gingold2022-07-291-1/+3
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* testsuite/gna: add a test for #2150Tristan Gingold2022-07-296-0/+94
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* vhdl-sem_stmts: set stop_flag on call to stop and severity failure.Tristan Gingold2022-07-291-22/+56
| | | | Fix #2150
* vhdl-nodes: add Get/Set_Stop_Flag. For #2150Tristan Gingold2022-07-296-135/+203
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* testsuite/synth: add a test for #2146Tristan Gingold2022-07-292-0/+69
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* netlists-memories: allow X in memories. Fix #2146Tristan Gingold2022-07-291-2/+4
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* testsuite/synth: add a test for #2149Tristan Gingold2022-07-282-0/+70
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* netlists-disp_verilog(disp_const_log): fix output. Fix #2149Tristan Gingold2022-07-281-2/+2
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* testsuite/synth: add a test for #2145Tristan Gingold2022-07-282-0/+48
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* synth-disp_vhdl: fix out conversion. Fix #2145Tristan Gingold2022-07-281-21/+29
| | | | In the case the width of a vector is only 1 bit
* testsuite/gna: add tests for #2148Tristan Gingold2022-07-285-0/+90
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* vhdl: check read for attribute parameter and aggregates. Fix #2148Tristan Gingold2022-07-282-3/+20
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* testsuite/gna: add a test for #2147Tristan Gingold2022-07-283-0/+41
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