1 files changed, 35 insertions, 0 deletions
diff --git a/testsuite/synth/issue1460/tb_rightmost01.vhdl b/testsuite/synth/issue1460/tb_rightmost01.vhdl
new file mode 100644
index 000000000..0196cfad0
--- /dev/null
+++ b/testsuite/synth/issue1460/tb_rightmost01.vhdl
@@ -0,0 +1,35 @@
+entity tb_rightmost01 is
+end tb_rightmost01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_rightmost01 is
+  signal a : unsigned (7 downto 0);
+  signal b : unsigned (8 to 12);
+  signal c : unsigned (0 to 3);
+  signal ra, rb, rc : integer;
+begin
+  dut_a: entity work.rightmost01
+    port map (a, ra);
+--  dut_b: entity work.rightmost01
+--    port map (b, rb);
+--  dut_c: entity work.rightmost01
+--    port map (c, rc);
+
+  process
+  begin
+    a <= b"0010_0100";
+    b <= b"00101";
+    c <= b"0000";
+
+    wait for 1 ns;
+
+    assert ra = 2 severity failure;
+--    assert rb = 10 severity failure;
+--    assert rc = -1 severity failure;
+
+    wait;
+  end process;
+end behav;