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-rw-r--r--testsuite/synth/issue1319/repro3.vhdl27
1 files changed, 27 insertions, 0 deletions
diff --git a/testsuite/synth/issue1319/repro3.vhdl b/testsuite/synth/issue1319/repro3.vhdl
new file mode 100644
index 000000000..ab578598c
--- /dev/null
+++ b/testsuite/synth/issue1319/repro3.vhdl
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+library work;
+
+entity repro3 is
+ port (
+ i : in std_ulogic_vector(1 downto 0);
+ o : out std_ulogic_vector (3 downto 0)
+ );
+end entity repro3;
+
+architecture behav of repro3 is
+ function func (v : std_ulogic_vector (1 downto 0)) return std_ulogic_vector is
+ begin
+ case v is
+ when "01" =>
+ null;
+ when others =>
+ return "0000";
+ end case;
+ return "1111";
+ end;
+begin
+ o <= func (i);
+end architecture behav;