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-rw-r--r--testsuite/synth/issue1264/repro.vhdl19
1 files changed, 19 insertions, 0 deletions
diff --git a/testsuite/synth/issue1264/repro.vhdl b/testsuite/synth/issue1264/repro.vhdl
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index 000000000..ad67b84a9
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+++ b/testsuite/synth/issue1264/repro.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity repro is
+ port (r : out std_logic);
+end repro;
+
+architecture beh of repro is
+begin
+ r <= '1';
+
+ assert (unsigned'(b"1001_0001") srl 1) = b"0100_1000";
+ assert (unsigned'(b"1001_0001") sll 1) = b"0010_0010";
+ assert (signed'(b"1001_0001") srl 1) = b"0100_1000";
+ assert (signed'(b"1001_0001") sll 1) = b"0010_0010";
+
+ -- assert false report to_bstring(signed'(b"1001_0001") srl 1);
+end architecture beh;