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-rw-r--r--src/vhdl/canon.adb3
-rw-r--r--src/vhdl/disp_vhdl.adb1
-rw-r--r--src/vhdl/ieee-vital_timing.adb7
-rw-r--r--src/vhdl/parse.adb1
-rw-r--r--src/vhdl/scanner.adb1
-rw-r--r--src/vhdl/sem_decls.adb1
-rw-r--r--src/vhdl/sem_psl.adb1
-rw-r--r--src/vhdl/sem_scopes.adb2
-rw-r--r--src/vhdl/std_package.adb1
-rw-r--r--src/vhdl/translate/ortho_front.adb2
-rw-r--r--src/vhdl/translate/trans-chap12.adb4
-rw-r--r--src/vhdl/translate/trans-chap7.adb10
-rw-r--r--src/vhdl/translate/trans-chap9.adb3
-rw-r--r--src/vhdl/translate/translation.adb1
14 files changed, 1 insertions, 37 deletions
diff --git a/src/vhdl/canon.adb b/src/vhdl/canon.adb
index 13f66b8f6..6c991bd0a 100644
--- a/src/vhdl/canon.adb
+++ b/src/vhdl/canon.adb
@@ -1722,7 +1722,6 @@ package body Canon is
-- Size the NFA and extract clock sensitivity.
procedure Canon_Psl_Clocked_NFA (Stmt : Iir)
is
- use PSL.Nodes;
Fa : constant PSL_NFA := Get_PSL_NFA (Stmt);
Num : Natural;
List : Iir_List;
@@ -2083,7 +2082,6 @@ package body Canon is
when Iir_Kind_Psl_Assert_Statement =>
declare
- use PSL.Nodes;
Prop : PSL_Node;
Fa : PSL_NFA;
begin
@@ -2100,7 +2098,6 @@ package body Canon is
when Iir_Kind_Psl_Cover_Statement =>
declare
- use PSL.Nodes;
Seq : PSL_Node;
Fa : PSL_NFA;
begin
diff --git a/src/vhdl/disp_vhdl.adb b/src/vhdl/disp_vhdl.adb
index f239eff1a..b82abe602 100644
--- a/src/vhdl/disp_vhdl.adb
+++ b/src/vhdl/disp_vhdl.adb
@@ -3157,7 +3157,6 @@ package body Disp_Vhdl is
procedure Disp_PSL_NFA (N : PSL.Nodes.NFA)
is
use PSL.NFAs;
- use PSL.Nodes;
procedure Disp_State (S : NFA_State) is
Str : constant String := Int32'Image (Get_State_Label (S));
diff --git a/src/vhdl/ieee-vital_timing.adb b/src/vhdl/ieee-vital_timing.adb
index 1d4885c7e..fc3f26349 100644
--- a/src/vhdl/ieee-vital_timing.adb
+++ b/src/vhdl/ieee-vital_timing.adb
@@ -357,8 +357,6 @@ package body Ieee.Vital_Timing is
-- Checks the port is an input port.
function Check_Input_Port return Iir
is
- use Name_Table;
-
Res : Iir;
begin
Res := Check_Port;
@@ -380,8 +378,6 @@ package body Ieee.Vital_Timing is
-- Checks the port is an output port.
function Check_Output_Port return Iir
is
- use Name_Table;
-
Res : Iir;
begin
Res := Check_Port;
@@ -413,8 +409,6 @@ package body Ieee.Vital_Timing is
function Get_Next_Suffix_Kind return Suffixes_Kind
is
- use Name_Table;
-
Len : Natural;
P : constant Natural := Gen_Name_Pos;
C : Character;
@@ -792,7 +786,6 @@ package body Ieee.Vital_Timing is
(Decl : Iir_Interface_Constant_Declaration; Prefix_Length : Natural)
return Boolean
is
- use Name_Table;
begin
-- IEEE 1076.4 4.3.1
-- It is an error for a model to use a timing generic prefix to begin
diff --git a/src/vhdl/parse.adb b/src/vhdl/parse.adb
index 02df6e458..162dda7b7 100644
--- a/src/vhdl/parse.adb
+++ b/src/vhdl/parse.adb
@@ -4936,7 +4936,6 @@ package body Parse is
-- Simply create the node for a bit string.
function Parse_Bit_String return Iir
is
- use Str_Table;
Res : Iir;
B : Number_Base_Type;
begin
diff --git a/src/vhdl/scanner.adb b/src/vhdl/scanner.adb
index 3ca706a50..537343af0 100644
--- a/src/vhdl/scanner.adb
+++ b/src/vhdl/scanner.adb
@@ -1332,7 +1332,6 @@ package body Scanner is
Error_Msg_Option ("8 bits characters not allowed in vhdl87");
end Error_8bit;
- use Name_Table;
C : Character;
subtype Id_Subtype is String (1 .. Str'Length);
Id : Id_Subtype renames Str;
diff --git a/src/vhdl/sem_decls.adb b/src/vhdl/sem_decls.adb
index ab0566753..de4f38f04 100644
--- a/src/vhdl/sem_decls.adb
+++ b/src/vhdl/sem_decls.adb
@@ -2633,7 +2633,6 @@ package body Sem_Decls is
function Sem_Alias_Declaration (Alias : Iir) return Iir
is
- use Std_Names;
Name : Iir;
Sig : Iir_Signature;
N_Entity : Iir;
diff --git a/src/vhdl/sem_psl.adb b/src/vhdl/sem_psl.adb
index fbafed60e..cc2512e60 100644
--- a/src/vhdl/sem_psl.adb
+++ b/src/vhdl/sem_psl.adb
@@ -524,7 +524,6 @@ package body Sem_Psl is
procedure Sem_Psl_Endpoint_Declaration (Stmt : Iir)
is
- use Sem_Scopes;
Decl : constant Node := Get_Psl_Declaration (Stmt);
Prop : Node;
begin
diff --git a/src/vhdl/sem_scopes.adb b/src/vhdl/sem_scopes.adb
index 708d56d2f..e0589dc3f 100644
--- a/src/vhdl/sem_scopes.adb
+++ b/src/vhdl/sem_scopes.adb
@@ -1493,7 +1493,6 @@ package body Sem_Scopes is
procedure Disp_Detailed_Interpretations (Ident : Name_Id)
is
use Ada.Text_IO;
- use Name_Table;
Inter: Name_Interpretation_Type;
Decl : Iir;
@@ -1559,7 +1558,6 @@ package body Sem_Scopes is
procedure Dump_Interpretation (Inter : Name_Interpretation_Type)
is
use Ada.Text_IO;
- use Name_Table;
Decl : Iir;
begin
diff --git a/src/vhdl/std_package.adb b/src/vhdl/std_package.adb
index ddf1ec43a..6d1456b7d 100644
--- a/src/vhdl/std_package.adb
+++ b/src/vhdl/std_package.adb
@@ -402,7 +402,6 @@ package body Std_Package is
Set_Design_File_Filename (Std_Standard_File, Std_Filename);
declare
- use Str_Table;
Std_Time_Stamp : constant Time_Stamp_String :=
"20020601000000.000";
Id : Time_Stamp_Id;
diff --git a/src/vhdl/translate/ortho_front.adb b/src/vhdl/translate/ortho_front.adb
index ac83f6142..236c94906 100644
--- a/src/vhdl/translate/ortho_front.adb
+++ b/src/vhdl/translate/ortho_front.adb
@@ -18,7 +18,7 @@
with Types; use Types;
with Name_Table;
with Iirs; use Iirs;
-with Libraries; use Libraries;
+with Libraries;
with Iirs_Utils; use Iirs_Utils;
with Std_Package;
with Flags;
diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 920271fa0..9522b5cd2 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -424,10 +424,7 @@ package body Trans.Chap12 is
-- Write to file FILELIST all the files that are needed to link the design.
procedure Gen_Stubs
is
- use Interfaces.C_Streams;
- use System;
use Configuration;
- use Name_Table;
-- Add all dependences of UNIT.
-- UNIT is not used, but added during link.
@@ -595,7 +592,6 @@ package body Trans.Chap12 is
Filelist : String;
Whole : Boolean)
is
- use Name_Table;
use Configuration;
Unit : Iir_Design_Unit;
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index 1373ffdcd..5b70c71e7 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -168,8 +168,6 @@ package body Trans.Chap7 is
Str : Iir;
El_Type : Iir)
is
- use Name_Table;
-
Literal_List : constant Iir_Flist :=
Get_Enumeration_Literal_List (Get_Base_Type (El_Type));
Len : constant Nat32 := Get_String_Length (Str);
@@ -272,8 +270,6 @@ package body Trans.Chap7 is
function Translate_Static_String_Literal8 (Str : Iir) return O_Cnode
is
- use Name_Table;
-
Lit_Type : constant Iir := Get_Type (Str);
Element_Type : constant Iir := Get_Element_Subtype (Lit_Type);
Arr_Type : O_Tnode;
@@ -297,8 +293,6 @@ package body Trans.Chap7 is
function Create_String_Literal_Var_Inner
(Str : Iir; Element_Type : Iir; Str_Type : O_Tnode) return Var_Type
is
- use Name_Table;
-
Val_Aggr : O_Array_Aggr_List;
Res : O_Cnode;
begin
@@ -319,8 +313,6 @@ package body Trans.Chap7 is
-- Create a variable (constant) for string or bit string literal STR.
function Create_String_Literal_Var (Str : Iir) return Var_Type
is
- use Name_Table;
-
Str_Type : constant Iir := Get_Type (Str);
Arr_Type : O_Tnode;
begin
@@ -339,8 +331,6 @@ package body Trans.Chap7 is
-- because it is not so in VHDL!
function Translate_Non_Static_String_Literal (Str : Iir) return O_Enode
is
- use Name_Table;
-
Len : constant Nat32 := Get_String_Length (Str);
Lit_Type : constant Iir := Get_Type (Str);
Type_Info : constant Type_Info_Acc := Get_Info (Lit_Type);
diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb
index 35585d315..b1001a4ed 100644
--- a/src/vhdl/translate/trans-chap9.adb
+++ b/src/vhdl/translate/trans-chap9.adb
@@ -326,9 +326,6 @@ package body Trans.Chap9 is
procedure Translate_Psl_Directive_Declarations (Stmt : Iir)
is
- use PSL.Nodes;
- use PSL.NFAs;
-
Mark : Id_Mark_Type;
Info : Ortho_Info_Acc;
begin
diff --git a/src/vhdl/translate/translation.adb b/src/vhdl/translate/translation.adb
index 6baaaa995..69b63abee 100644
--- a/src/vhdl/translate/translation.adb
+++ b/src/vhdl/translate/translation.adb
@@ -105,7 +105,6 @@ package body Translation is
function Translate_Foreign_Id (Decl : Iir) return Foreign_Info_Type
is
- use Name_Table;
-- Look for 'FOREIGN.
Attr : constant Iir_Attribute_Value :=
Sem_Specs.Find_Attribute_Value (Decl, Std_Names.Name_Foreign);
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-30 15:00:43 +0000