diff options
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/elab-vhdl_insts.adb | 21 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 32 |
2 files changed, 28 insertions, 25 deletions
diff --git a/src/synth/elab-vhdl_insts.adb b/src/synth/elab-vhdl_insts.adb index 4a1eb7331..f2f53bb68 100644 --- a/src/synth/elab-vhdl_insts.adb +++ b/src/synth/elab-vhdl_insts.adb @@ -360,7 +360,8 @@ package body Elab.Vhdl_Insts is while Item /= Null_Node loop case Get_Kind (Item) is when Iir_Kind_Psl_Default_Clock - | Iir_Kind_Psl_Declaration => + | Iir_Kind_Psl_Declaration + | Iir_Kind_PSL_Inherit_Spec => null; when Iir_Kind_Psl_Assert_Directive | Iir_Kind_Psl_Assume_Directive @@ -368,15 +369,15 @@ package body Elab.Vhdl_Insts is | Iir_Kind_Psl_Restrict_Directive => null; when Iir_Kind_Signal_Declaration - | Iir_Kind_Constant_Declaration - | Iir_Kind_Function_Declaration - | Iir_Kind_Procedure_Declaration - | Iir_Kind_Function_Body - | Iir_Kind_Procedure_Body - | Iir_Kind_Attribute_Declaration - | Iir_Kind_Attribute_Specification - | Iir_Kind_Object_Alias_Declaration - | Iir_Kind_Non_Object_Alias_Declaration => + | Iir_Kind_Constant_Declaration + | Iir_Kind_Function_Declaration + | Iir_Kind_Procedure_Declaration + | Iir_Kind_Function_Body + | Iir_Kind_Procedure_Body + | Iir_Kind_Attribute_Declaration + | Iir_Kind_Attribute_Specification + | Iir_Kind_Object_Alias_Declaration + | Iir_Kind_Non_Object_Alias_Declaration => Elab_Declaration (Unit_Inst, Item, Last_Type); when Iir_Kinds_Concurrent_Signal_Assignment | Iir_Kinds_Process_Statement diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index d26b24f73..5f1d4a3fd 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -3769,7 +3769,8 @@ package body Synth.Vhdl_Stmts is while Item /= Null_Node loop case Get_Kind (Item) is when Iir_Kind_Psl_Default_Clock - | Iir_Kind_Psl_Declaration => + | Iir_Kind_Psl_Declaration + | Iir_Kind_PSL_Inherit_Spec => null; when Iir_Kind_Psl_Assert_Directive => Synth_Psl_Assert_Directive (Syn_Inst, Item); @@ -3810,11 +3811,12 @@ package body Synth.Vhdl_Stmts is while Item /= Null_Node loop case Get_Kind (Item) is when Iir_Kind_Psl_Default_Clock - | Iir_Kind_Psl_Assert_Directive - | Iir_Kind_Psl_Assume_Directive - | Iir_Kind_Psl_Restrict_Directive - | Iir_Kind_Psl_Cover_Directive - | Iir_Kind_Psl_Declaration => + | Iir_Kind_Psl_Assert_Directive + | Iir_Kind_Psl_Assume_Directive + | Iir_Kind_Psl_Restrict_Directive + | Iir_Kind_Psl_Cover_Directive + | Iir_Kind_Psl_Declaration + | Iir_Kind_PSL_Inherit_Spec => null; when Iir_Kinds_Concurrent_Signal_Assignment | Iir_Kinds_Process_Statement @@ -3824,15 +3826,15 @@ package body Synth.Vhdl_Stmts is | Iir_Kind_Component_Instantiation_Statement => null; when Iir_Kind_Signal_Declaration - | Iir_Kind_Constant_Declaration - | Iir_Kind_Function_Declaration - | Iir_Kind_Procedure_Declaration - | Iir_Kind_Function_Body - | Iir_Kind_Procedure_Body - | Iir_Kind_Attribute_Declaration - | Iir_Kind_Attribute_Specification - | Iir_Kind_Object_Alias_Declaration - | Iir_Kind_Non_Object_Alias_Declaration => + | Iir_Kind_Constant_Declaration + | Iir_Kind_Function_Declaration + | Iir_Kind_Procedure_Declaration + | Iir_Kind_Function_Body + | Iir_Kind_Procedure_Body + | Iir_Kind_Attribute_Declaration + | Iir_Kind_Attribute_Specification + | Iir_Kind_Object_Alias_Declaration + | Iir_Kind_Non_Object_Alias_Declaration => Finalize_Declaration (Syn_Inst, Item, False); when others => Error_Kind ("synth_verification_unit(2)", Item); |