diff options
Diffstat (limited to 'src/synth/elab-vhdl_expr.adb')
| -rw-r--r-- | src/synth/elab-vhdl_expr.adb | 117 |
1 files changed, 54 insertions, 63 deletions
diff --git a/src/synth/elab-vhdl_expr.adb b/src/synth/elab-vhdl_expr.adb index a920d2a8f..6982b825f 100644 --- a/src/synth/elab-vhdl_expr.adb +++ b/src/synth/elab-vhdl_expr.adb @@ -60,15 +60,7 @@ package body Elab.Vhdl_Expr is declare Bnds : constant Type_Acc := Get_Subtype_Object (Syn_Inst, Atype); begin - case Bnds.Kind is - when Type_Vector => - pragma Assert (Dim = 1); - return Bnds.Vbound; - when Type_Array => - return Bnds.Abounds.D (Dim); - when others => - raise Internal_Error; - end case; + return Get_Array_Bound (Bnds, Dim); end; end if; end Synth_Array_Bounds; @@ -94,8 +86,8 @@ package body Elab.Vhdl_Expr is end case; end Synth_Bounds_From_Length; - function Synth_Simple_Aggregate (Syn_Inst : Synth_Instance_Acc; - Aggr : Node) return Valtyp + function Exec_Simple_Aggregate (Syn_Inst : Synth_Instance_Acc; + Aggr : Node) return Valtyp is Aggr_Type : constant Node := Get_Type (Aggr); pragma Assert (Get_Nbr_Dimensions (Aggr_Type) = 1); @@ -104,7 +96,6 @@ package body Elab.Vhdl_Expr is Els : constant Iir_Flist := Get_Simple_Aggregate_List (Aggr); Last : constant Natural := Flist_Last (Els); Bnd : Bound_Type; - Bnds : Bound_Array_Acc; Res_Type : Type_Acc; Val : Valtyp; Res : Valtyp; @@ -116,9 +107,7 @@ package body Elab.Vhdl_Expr is if El_Typ.Kind in Type_Nets then Res_Type := Create_Vector_Type (Bnd, El_Typ); else - Bnds := Create_Bound_Array (1); - Bnds.D (1) := Bnd; - Res_Type := Create_Array_Type (Bnds, El_Typ); + Res_Type := Create_Array_Type (Bnd, True, El_Typ); end if; Res := Create_Value_Memory (Res_Type); @@ -132,7 +121,7 @@ package body Elab.Vhdl_Expr is end loop; return Res; - end Synth_Simple_Aggregate; + end Exec_Simple_Aggregate; -- Change the bounds of VAL. function Reshape_Value (Val : Valtyp; Ntype : Type_Acc) return Valtyp is @@ -221,18 +210,28 @@ package body Elab.Vhdl_Expr is when Type_Array => pragma Assert (Vtype.Kind = Type_Array); -- Check bounds. - for I in Vtype.Abounds.D'Range loop - if Vtype.Abounds.D (I).Len /= Dtype.Abounds.D (I).Len then - Error_Msg_Elab (+Loc, "mismatching array bounds"); - return No_Valtyp; + declare + Src_Typ, Dst_Typ : Type_Acc; + begin + Src_Typ := Vtype; + Dst_Typ := Dtype; + loop + pragma Assert (Src_Typ.Alast = Dst_Typ.Alast); + if Src_Typ.Abound.Len /= Dst_Typ.Abound.Len then + Error_Msg_Elab (+Loc, "mismatching array bounds"); + return No_Valtyp; + end if; + exit when Src_Typ.Alast; + Src_Typ := Src_Typ.Arr_El; + Dst_Typ := Dst_Typ.Arr_El; + end loop; + -- TODO: check element. + if Bounds then + return Reshape_Value (Vt, Dtype); + else + return Vt; end if; - end loop; - -- TODO: check element. - if Bounds then - return Reshape_Value (Vt, Dtype); - else - return Vt; - end if; + end; when Type_Unbounded_Array => pragma Assert (Vtype.Kind = Type_Array); return Vt; @@ -258,8 +257,8 @@ package body Elab.Vhdl_Expr is end case; end Exec_Subtype_Conversion; - function Synth_Value_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node) - return Valtyp + function Exec_Value_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node) + return Valtyp is Param : constant Node := Get_Parameter (Attr); Etype : constant Node := Get_Type (Attr); @@ -297,7 +296,7 @@ package body Elab.Vhdl_Expr is end case; return Create_Value_Discrete (Val, Dtype); end; - end Synth_Value_Attribute; + end Exec_Value_Attribute; function Synth_Image_Attribute_Str (Val : Valtyp; Expr_Type : Iir) return String @@ -355,14 +354,13 @@ package body Elab.Vhdl_Expr is function String_To_Valtyp (Str : String; Styp : Type_Acc) return Valtyp is Len : constant Natural := Str'Length; - Bnd : Bound_Array_Acc; + Bnd : Bound_Type; Typ : Type_Acc; Res : Valtyp; begin - Bnd := Create_Bound_Array (1); - Bnd.D (1) := (Dir => Dir_To, Left => 1, Right => Int32 (Len), - Len => Uns32 (Len)); - Typ := Create_Array_Type (Bnd, Styp.Uarr_El); + Bnd := (Dir => Dir_To, Left => 1, Right => Int32 (Len), + Len => Uns32 (Len)); + Typ := Create_Array_Type (Bnd, True, Styp.Uarr_El); Res := Create_Value_Memory (Typ); for I in Str'Range loop @@ -372,8 +370,8 @@ package body Elab.Vhdl_Expr is return Res; end String_To_Valtyp; - function Synth_Image_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node) - return Valtyp + function Exec_Image_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node) + return Valtyp is Param : constant Node := Get_Parameter (Attr); Etype : constant Node := Get_Type (Attr); @@ -394,9 +392,9 @@ package body Elab.Vhdl_Expr is Strip_Const (V); return String_To_Valtyp (Synth_Image_Attribute_Str (V, Get_Type (Param)), Dtype); - end Synth_Image_Attribute; + end Exec_Image_Attribute; - function Synth_Instance_Name_Attribute + function Exec_Instance_Name_Attribute (Syn_Inst : Synth_Instance_Acc; Attr : Node) return Valtyp is Atype : constant Node := Get_Type (Attr); @@ -406,7 +404,7 @@ package body Elab.Vhdl_Expr is begin -- Return a truncated name, as the prefix is not completly known. return String_To_Valtyp (Name.Suffix, Atyp); - end Synth_Instance_Name_Attribute; + end Exec_Instance_Name_Attribute; -- Convert index IDX in PFX to an offset. -- SYN_INST and LOC are used in case of error. @@ -452,8 +450,9 @@ package body Elab.Vhdl_Expr is El_Typ := Typ.Vec_El; Bnd := Typ.Vbound; when Type_Array => + pragma Assert (Typ.Alast); El_Typ := Typ.Arr_El; - Bnd := Typ.Abounds.D (1); + Bnd := Typ.Abound; when others => raise Internal_Error; end case; @@ -463,7 +462,6 @@ package body Elab.Vhdl_Expr is (Btyp : Type_Acc; Bnd : Bound_Type; El_Typ : Type_Acc) return Type_Acc is Res : Type_Acc; - Bnds : Bound_Array_Acc; begin case Btyp.Kind is when Type_Vector => @@ -473,17 +471,13 @@ package body Elab.Vhdl_Expr is pragma Assert (El_Typ.Kind in Type_Nets); Res := Create_Vector_Type (Bnd, Btyp.Uvec_El); when Type_Array => - pragma Assert (Btyp.Abounds.Ndim = 1); + pragma Assert (Btyp.Alast); pragma Assert (Is_Bounded_Type (Btyp.Arr_El)); - Bnds := Create_Bound_Array (1); - Bnds.D (1) := Bnd; - Res := Create_Array_Type (Bnds, Btyp.Arr_El); + Res := Create_Array_Type (Bnd, True, Btyp.Arr_El); when Type_Unbounded_Array => pragma Assert (Btyp.Uarr_Ndim = 1); pragma Assert (Is_Bounded_Type (El_Typ)); - Bnds := Create_Bound_Array (1); - Bnds.D (1) := Bnd; - Res := Create_Array_Type (Bnds, El_Typ); + Res := Create_Array_Type (Bnd, True, El_Typ); when others => raise Internal_Error; end case; @@ -994,9 +988,9 @@ package body Elab.Vhdl_Expr is return False; end Error_Ieee_Operator; - function Synth_String_Literal - (Syn_Inst : Synth_Instance_Acc; Str : Node; Str_Typ : Type_Acc) - return Valtyp + function Exec_String_Literal (Syn_Inst : Synth_Instance_Acc; + Str : Node; + Str_Typ : Type_Acc) return Valtyp is pragma Unreferenced (Syn_Inst); pragma Assert (Get_Kind (Str) = Iir_Kind_String_Literal8); @@ -1005,7 +999,6 @@ package body Elab.Vhdl_Expr is Str_Type : constant Node := Get_Type (Str); El_Type : Type_Acc; Bounds : Bound_Type; - Bnds : Bound_Array_Acc; Res_Type : Type_Acc; Res : Valtyp; Pos : Nat8; @@ -1014,7 +1007,7 @@ package body Elab.Vhdl_Expr is when Type_Vector => Bounds := Str_Typ.Vbound; when Type_Array => - Bounds := Str_Typ.Abounds.D (1); + Bounds := Str_Typ.Abound; when Type_Unbounded_Vector | Type_Unbounded_Array => Bounds := Synth_Bounds_From_Length @@ -1027,9 +1020,7 @@ package body Elab.Vhdl_Expr is if El_Type.Kind in Type_Nets then Res_Type := Create_Vector_Type (Bounds, El_Type); else - Bnds := Create_Bound_Array (1); - Bnds.D (1) := Bounds; - Res_Type := Create_Array_Type (Bnds, El_Type); + Res_Type := Create_Array_Type (Bounds, True, El_Type); end if; Res := Create_Value_Memory (Res_Type); @@ -1044,7 +1035,7 @@ package body Elab.Vhdl_Expr is end loop; return Res; - end Synth_String_Literal; + end Exec_String_Literal; -- Return the left bound if the direction of the range is LEFT_DIR. function Synth_Low_High_Type_Attribute @@ -1246,7 +1237,7 @@ package body Elab.Vhdl_Expr is return Create_Value_Discrete (Get_Physical_Value (Expr), Expr_Type); when Iir_Kind_String_Literal8 => - return Synth_String_Literal (Syn_Inst, Expr, Expr_Type); + return Exec_String_Literal (Syn_Inst, Expr, Expr_Type); when Iir_Kind_Enumeration_Literal => return Exec_Name (Syn_Inst, Expr); when Iir_Kind_Type_Conversion => @@ -1272,7 +1263,7 @@ package body Elab.Vhdl_Expr is when Iir_Kind_Aggregate => return Synth.Vhdl_Aggr.Synth_Aggregate (Syn_Inst, Expr, Expr_Type); when Iir_Kind_Simple_Aggregate => - return Synth_Simple_Aggregate (Syn_Inst, Expr); + return Exec_Simple_Aggregate (Syn_Inst, Expr); when Iir_Kind_Parenthesis_Expression => return Exec_Expression_With_Type (Syn_Inst, Get_Expression (Expr), Expr_Type); @@ -1358,11 +1349,11 @@ package body Elab.Vhdl_Expr is when Iir_Kind_High_Type_Attribute => return Synth_Low_High_Type_Attribute (Syn_Inst, Expr, Dir_Downto); when Iir_Kind_Value_Attribute => - return Synth_Value_Attribute (Syn_Inst, Expr); + return Exec_Value_Attribute (Syn_Inst, Expr); when Iir_Kind_Image_Attribute => - return Synth_Image_Attribute (Syn_Inst, Expr); + return Exec_Image_Attribute (Syn_Inst, Expr); when Iir_Kind_Instance_Name_Attribute => - return Synth_Instance_Name_Attribute (Syn_Inst, Expr); + return Exec_Instance_Name_Attribute (Syn_Inst, Expr); when Iir_Kind_Null_Literal => return Create_Value_Access (Null_Heap_Index, Expr_Type); when Iir_Kind_Allocator_By_Subtype => |