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-rw-r--r--pyGHDL/dom/DesignUnit.py6
1 files changed, 4 insertions, 2 deletions
diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py
index 057a2c8cd..eebf888bc 100644
--- a/pyGHDL/dom/DesignUnit.py
+++ b/pyGHDL/dom/DesignUnit.py
@@ -49,7 +49,7 @@ from pyVHDLModel import (
LibraryClause as VHDLModel_LibraryClause,
UseClause as VHDLModel_UseClause,
ContextReference as VHDLModel_ContextReference,
- Name
+ Name,
)
from pyVHDLModel.SyntaxModel import (
Entity as VHDLModel_Entity,
@@ -62,7 +62,9 @@ from pyVHDLModel.SyntaxModel import (
Component as VHDLModel_Component,
GenericInterfaceItem,
PortInterfaceItem,
- ConcurrentStatement, PackageReferenceSymbol, ContextReferenceSymbol,
+ ConcurrentStatement,
+ PackageReferenceSymbol,
+ ContextReferenceSymbol,
)
from pyGHDL.libghdl import utils