5 files changed, 81 insertions, 0 deletions
diff --git a/testsuite/synth/issue1283/issue1.vhdl b/testsuite/synth/issue1283/issue1.vhdl
new file mode 100644
index 000000000..ee001e537
--- /dev/null
+++ b/testsuite/synth/issue1283/issue1.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue1 is
+end issue1;
+
+architecture beh of issue1 is
+    type t_rec is
+        record
+            elem : std_logic_vector;
+        end record;
+begin
+    assert t_rec'(elem => "000") = t_rec'(elem => "000");
+    assert t_rec'(elem => "001") = t_rec'(elem => "000") severity note;
+end architecture beh;
diff --git a/testsuite/synth/issue1283/issue2.vhdl b/testsuite/synth/issue1283/issue2.vhdl
new file mode 100644
index 000000000..31425026d
--- /dev/null
+++ b/testsuite/synth/issue1283/issue2.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue2 is
+end issue2;
+
+architecture beh of issue2 is
+    type t_rec is
+        record
+            elem : std_logic_vector (3 downto 0);
+        end record;
+
+    function fun (arg : std_logic_vector) return t_rec is
+    begin
+        return t_rec'(elem => arg);
+    end function;
+begin
+    -- wrong length
+    -- -a accepts
+    -- -synth error + bug report
+    assert fun ("000") = fun ("000");
+end architecture beh;
diff --git a/testsuite/synth/issue1283/issue3.vhdl b/testsuite/synth/issue1283/issue3.vhdl
new file mode 100644
index 000000000..809fcd49c
--- /dev/null
+++ b/testsuite/synth/issue1283/issue3.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue3 is
+end issue3;
+
+architecture beh of issue3 is
+    type t_rec is
+        record
+            elem : std_logic_vector (3 downto 0);
+        end record;
+begin
+    assert t_rec'(elem => 4b"0") = t_rec'(elem => 3b"0");
+end architecture beh;
+
diff --git a/testsuite/synth/issue1283/issue4.vhdl b/testsuite/synth/issue1283/issue4.vhdl
new file mode 100644
index 000000000..41078caf7
--- /dev/null
+++ b/testsuite/synth/issue1283/issue4.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue4 is
+end issue4;
+
+architecture beh of issue4 is
+    type t_rec is
+        record
+            elem : std_logic_vector (3 downto 0);
+        end record;
+
+    signal foo : std_logic_vector (4 downto 0);
+begin
+    assert t_rec'(elem => foo) = t_rec'(elem => foo);
+end architecture beh;
diff --git a/testsuite/synth/issue1283/testsuite.sh b/testsuite/synth/issue1283/testsuite.sh
new file mode 100755
index 000000000..db68cde84
--- /dev/null
+++ b/testsuite/synth/issue1283/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+GHDL_STD_FLAGS=--std=08
+synth_analyze issue1
+synth_failure issue2
+synth_failure issue3
+synth_failure issue4
+
+clean
+
+echo "Test successful"