From 70acfa684c7752dd836d4bf95c4b7d4d83053592 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 5 Nov 2019 04:44:55 +0100
Subject: testsuite: move pr tests in issues/

---
 testsuite/issues/pr61/testsuite.sh | 17 +++++++++++++++++
 testsuite/issues/pr61/vector.vhdl  | 15 +++++++++++++++
 testsuite/issues/pr63/testsuite.sh | 13 +++++++++++++
 testsuite/issues/pr63/vector.vhdl  | 14 ++++++++++++++
 testsuite/issues/pr64/testsuite.sh | 14 ++++++++++++++
 testsuite/issues/pr64/vector.vhdl  | 16 ++++++++++++++++
 testsuite/issues/pr66/testsuite.sh | 12 ++++++++++++
 testsuite/issues/pr66/vector.vhdl  | 14 ++++++++++++++
 testsuite/pr61/testsuite.sh        | 13 -------------
 testsuite/pr61/vector.vhdl         | 15 ---------------
 testsuite/pr63/testsuite.sh        | 10 ----------
 testsuite/pr63/vector.vhdl         | 14 --------------
 testsuite/pr64/testsuite.sh        | 11 -----------
 testsuite/pr64/vector.vhdl         | 16 ----------------
 testsuite/pr66/testsuite.sh        | 10 ----------
 testsuite/pr66/vector.vhdl         | 14 --------------
 testsuite/testsuite.sh             |  1 -
 17 files changed, 115 insertions(+), 104 deletions(-)
 create mode 100755 testsuite/issues/pr61/testsuite.sh
 create mode 100644 testsuite/issues/pr61/vector.vhdl
 create mode 100755 testsuite/issues/pr63/testsuite.sh
 create mode 100644 testsuite/issues/pr63/vector.vhdl
 create mode 100755 testsuite/issues/pr64/testsuite.sh
 create mode 100644 testsuite/issues/pr64/vector.vhdl
 create mode 100755 testsuite/issues/pr66/testsuite.sh
 create mode 100644 testsuite/issues/pr66/vector.vhdl
 delete mode 100755 testsuite/pr61/testsuite.sh
 delete mode 100644 testsuite/pr61/vector.vhdl
 delete mode 100755 testsuite/pr63/testsuite.sh
 delete mode 100644 testsuite/pr63/vector.vhdl
 delete mode 100755 testsuite/pr64/testsuite.sh
 delete mode 100644 testsuite/pr64/vector.vhdl
 delete mode 100755 testsuite/pr66/testsuite.sh
 delete mode 100644 testsuite/pr66/vector.vhdl

diff --git a/testsuite/issues/pr61/testsuite.sh b/testsuite/issues/pr61/testsuite.sh
new file mode 100755
index 0000000..cbbaeda
--- /dev/null
+++ b/testsuite/issues/pr61/testsuite.sh
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+topdir=../..
+. $topdir/testenv.sh
+
+run_yosys -q -p "ghdl vector.vhdl -e vector; dump -o vector.il"
+
+grep -q 0000000000000000000000000000000011111111111111111111111111111010 vector.il || exit 1
+grep -q 0000000011111111111111111111111111111111111111111111111100000000 vector.il || exit 1
+grep -q 1111111111111111111111111111111111111111111111111111111111111111 vector.il || exit 1
+grep -q 0000111111111111111111111111111111111111111111111111111111110000 vector.il || exit 1
+
+rm -f vector.il
+
+clean
+
+echo "OK"
diff --git a/testsuite/issues/pr61/vector.vhdl b/testsuite/issues/pr61/vector.vhdl
new file mode 100644
index 0000000..61a0d67
--- /dev/null
+++ b/testsuite/issues/pr61/vector.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity vector is
+  port (v: out signed(63 downto 0);
+        u: out unsigned(63 downto 0));
+end vector;
+
+architecture synth of vector is
+
+begin
+  v <= signed'(x"0ffffffffffffff0")+(-1);
+  u <= unsigned'(x"00ffffffffffff00")+4294967290;
+end synth;
diff --git a/testsuite/issues/pr63/testsuite.sh b/testsuite/issues/pr63/testsuite.sh
new file mode 100755
index 0000000..cc40f65
--- /dev/null
+++ b/testsuite/issues/pr63/testsuite.sh
@@ -0,0 +1,13 @@
+#!/bin/sh
+
+topdir=../..
+. $topdir/testenv.sh
+
+run_yosys -q -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
+
+grep -q 1111000000000000000000000000000000000000000000000000000000010000 vector.il || exit 1
+
+clean
+
+rm vector.il
+echo OK
diff --git a/testsuite/issues/pr63/vector.vhdl b/testsuite/issues/pr63/vector.vhdl
new file mode 100644
index 0000000..568d3f3
--- /dev/null
+++ b/testsuite/issues/pr63/vector.vhdl
@@ -0,0 +1,14 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity vector is
+    port (
+        u : out signed(63 downto 0)
+        );
+end entity vector;
+
+architecture synth of vector is
+begin
+    u <= -signed'(x"0ffffffffffffff0");
+end synth;
diff --git a/testsuite/issues/pr64/testsuite.sh b/testsuite/issues/pr64/testsuite.sh
new file mode 100755
index 0000000..0073184
--- /dev/null
+++ b/testsuite/issues/pr64/testsuite.sh
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+topdir=../..
+. $topdir/testenv.sh
+
+run_yosys -q -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
+
+grep -q 11111111111011110000000000100000000000001101111111110000000000000001000011111111111011110000000000000001000000000000000000000000 vector.il || exit 1
+grep -q 00000000000000000000000000001111111111111110111111110000000100000001000011111111111011110000000000000001000000000000000000000000 vector.il || exit 1
+
+clean
+
+rm vector.il
+echo OK
diff --git a/testsuite/issues/pr64/vector.vhdl b/testsuite/issues/pr64/vector.vhdl
new file mode 100644
index 0000000..c88c117
--- /dev/null
+++ b/testsuite/issues/pr64/vector.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity vector is
+    port (
+        s : out signed(127 downto 0);
+        u : out unsigned(127 downto 0)
+        );
+end entity vector;
+
+architecture synth of vector is
+begin
+    s <= signed'(x"ffff000000fffff0") * signed'(x"fff0000ffff00000");
+    u <= unsigned'(x"ffff000000fffff0") * unsigned'(x"fff0000ffff00000");
+end synth;
diff --git a/testsuite/issues/pr66/testsuite.sh b/testsuite/issues/pr66/testsuite.sh
new file mode 100755
index 0000000..6d8bc7e
--- /dev/null
+++ b/testsuite/issues/pr66/testsuite.sh
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+topdir=../..
+. $topdir/testenv.sh
+
+run_yosys -q -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
+
+grep -q 'connect \\v 63' vector.il || exit 1
+
+clean
+rm  vector.il
+echo OK
diff --git a/testsuite/issues/pr66/vector.vhdl b/testsuite/issues/pr66/vector.vhdl
new file mode 100644
index 0000000..3eb9951
--- /dev/null
+++ b/testsuite/issues/pr66/vector.vhdl
@@ -0,0 +1,14 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity vector is
+    port (v: out integer
+          );
+end vector;
+
+architecture synth of vector is
+
+begin
+    v <= to_integer(unsigned'(x"7fffffff")) mod 64;
+end synth;
diff --git a/testsuite/pr61/testsuite.sh b/testsuite/pr61/testsuite.sh
deleted file mode 100755
index b546495..0000000
--- a/testsuite/pr61/testsuite.sh
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-topdir=..
-. $topdir/testenv.sh
-
-run_yosys -p "ghdl vector.vhdl -e vector; dump -o vector.il"
-
-grep -q 0000000000000000000000000000000011111111111111111111111111111010 vector.il || exit 1
-grep -q 0000000011111111111111111111111111111111111111111111111100000000 vector.il || exit 1
-grep -q 1111111111111111111111111111111111111111111111111111111111111111 vector.il || exit 1
-grep -q 0000111111111111111111111111111111111111111111111111111111110000 vector.il || exit 1
-
-clean
diff --git a/testsuite/pr61/vector.vhdl b/testsuite/pr61/vector.vhdl
deleted file mode 100644
index 61a0d67..0000000
--- a/testsuite/pr61/vector.vhdl
+++ /dev/null
@@ -1,15 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-
-entity vector is
-  port (v: out signed(63 downto 0);
-        u: out unsigned(63 downto 0));
-end vector;
-
-architecture synth of vector is
-
-begin
-  v <= signed'(x"0ffffffffffffff0")+(-1);
-  u <= unsigned'(x"00ffffffffffff00")+4294967290;
-end synth;
diff --git a/testsuite/pr63/testsuite.sh b/testsuite/pr63/testsuite.sh
deleted file mode 100755
index fdeda12..0000000
--- a/testsuite/pr63/testsuite.sh
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-
-topdir=..
-. $topdir/testenv.sh
-
-run_yosys -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
-
-grep -q 1111000000000000000000000000000000000000000000000000000000010000 vector.il || exit 1
-
-clean
diff --git a/testsuite/pr63/vector.vhdl b/testsuite/pr63/vector.vhdl
deleted file mode 100644
index 568d3f3..0000000
--- a/testsuite/pr63/vector.vhdl
+++ /dev/null
@@ -1,14 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-
-entity vector is
-    port (
-        u : out signed(63 downto 0)
-        );
-end entity vector;
-
-architecture synth of vector is
-begin
-    u <= -signed'(x"0ffffffffffffff0");
-end synth;
diff --git a/testsuite/pr64/testsuite.sh b/testsuite/pr64/testsuite.sh
deleted file mode 100755
index e159293..0000000
--- a/testsuite/pr64/testsuite.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/sh
-
-topdir=..
-. $topdir/testenv.sh
-
-run_yosys -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
-
-grep -q 11111111111011110000000000100000000000001101111111110000000000000001000011111111111011110000000000000001000000000000000000000000 vector.il || exit 1
-grep -q 00000000000000000000000000001111111111111110111111110000000100000001000011111111111011110000000000000001000000000000000000000000 vector.il || exit 1
-
-clean
diff --git a/testsuite/pr64/vector.vhdl b/testsuite/pr64/vector.vhdl
deleted file mode 100644
index c88c117..0000000
--- a/testsuite/pr64/vector.vhdl
+++ /dev/null
@@ -1,16 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-
-entity vector is
-    port (
-        s : out signed(127 downto 0);
-        u : out unsigned(127 downto 0)
-        );
-end entity vector;
-
-architecture synth of vector is
-begin
-    s <= signed'(x"ffff000000fffff0") * signed'(x"fff0000ffff00000");
-    u <= unsigned'(x"ffff000000fffff0") * unsigned'(x"fff0000ffff00000");
-end synth;
diff --git a/testsuite/pr66/testsuite.sh b/testsuite/pr66/testsuite.sh
deleted file mode 100755
index ee6162f..0000000
--- a/testsuite/pr66/testsuite.sh
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-
-topdir=..
-. $topdir/testenv.sh
-
-run_yosys -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il"
-
-grep -q 'connect \\v 63' vector.il || exit 1
-
-clean
diff --git a/testsuite/pr66/vector.vhdl b/testsuite/pr66/vector.vhdl
deleted file mode 100644
index 3eb9951..0000000
--- a/testsuite/pr66/vector.vhdl
+++ /dev/null
@@ -1,14 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-
-entity vector is
-    port (v: out integer
-          );
-end vector;
-
-architecture synth of vector is
-
-begin
-    v <= to_integer(unsigned'(x"7fffffff")) mod 64;
-end synth;
diff --git a/testsuite/testsuite.sh b/testsuite/testsuite.sh
index 3354d8e..01cb464 100755
--- a/testsuite/testsuite.sh
+++ b/testsuite/testsuite.sh
@@ -18,7 +18,6 @@ run_suite () {
       else
           printf "${ANSI_YELLOW}Skip $d (no testsuite.sh)${ANSI_NOCOLOR}\n"
       fi
-      clean
   done
 }
 
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