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authorTim Ansell <tansell@google.com>2021-05-11 07:30:43 -0700
committerGitHub <noreply@github.com>2021-05-11 07:30:43 -0700
commitd9c7a0b366f8ad73d867211bd841fc11efd3b124 (patch)
treed832f2dfa7e93dd63eae77f2a6e882c3a9802a59 /docs/device_resources.md
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parent828ec3a6188c74bd43825c11b71cc3bbbd65b26e (diff)
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Merge pull request #52 from gatecat/site-pips-diagrams
docs: Add a diagram showing legal/illegal site pip usage
Diffstat (limited to 'docs/device_resources.md')
-rw-r--r--docs/device_resources.md8
1 files changed, 7 insertions, 1 deletions
diff --git a/docs/device_resources.md b/docs/device_resources.md
index 323e177..9793098 100644
--- a/docs/device_resources.md
+++ b/docs/device_resources.md
@@ -242,6 +242,10 @@ entered via the site port corresponding to the site pin. The first site wire
in the site will be the site wire attached to the output BEL pin of the site
port. From there site routing continues per above.
+![Wire and nodes](https://symbiflow.readthedocs.io/projects/arch-defs/en/latest/_images/rrgraph-wire.svg)
+
+### Use of site PIPs
+
It is important to note that site PIPs can only be used to access placed cells
inside that site. Site PIPs cannot be used as general route-thrus, to route
from site input to output. General route-thrus across entire sites should use
@@ -255,7 +259,9 @@ an associated flipflop input inside the site. The tile PIP would be used to
route across the entire site as part of the general, inter-tile, routing
problem.
-![Wire and nodes](https://symbiflow.readthedocs.io/projects/arch-defs/en/latest/_images/rrgraph-wire.svg)
+A diagram illustrating the legal and illegal uses is shown below.
+
+![Site PIP usage](site_pip_usage.svg)
### Tile Types and site types