/* * Copyright © 2007-2008 Intel Corporation * Jesse Barnes * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef __DRM_EDID_H__ #define __DRM_EDID_H__ #include #define EDID_LENGTH 128 #define DDC_ADDR 0x50 #define CEA_EXT 0x02 #define VTB_EXT 0x10 #define DI_EXT 0x40 #define LS_EXT 0x50 #define MI_EXT 0x60 struct est_timings { u8 t1; u8 t2; u8 mfg_rsvd; } __attribute__((packed)); /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ #define EDID_TIMING_ASPECT_SHIFT 6 #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) /* need to add 60 */ #define EDID_TIMING_VFREQ_SHIFT 0 #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) struct std_timing { u8 hsize; /* need to multiply by 8 then add 248 */ u8 vfreq_aspect; } __attribute__((packed)); #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) /* If detailed data is pixel timing */ struct detailed_pixel_timing { u8 hactive_lo; u8 hblank_lo; u8 hactive_hblank_hi; u8 vactive_lo; u8 vblank_lo; u8 vactive_vblank_hi; u8 hsync_offset_lo; u8 hsync_pulse_width_lo; u8 vsync_offset_pulse_width_lo; u8 hsync_vsync_offset_pulse_width_hi; u8 width_mm_lo; u8 height_mm_lo; u8 width_height_mm_hi; u8 hborder; u8 vborder; u8 misc; } __attribute__((packed)); /* If it's not pixel timing, it'll be one of the below */ struct detailed_data_string { u8 str[13]; } __attribute__((packed)); struct detailed_data_monitor_range { u8 min_vfreq; u8 max_vfreq; u8 min_hfreq_khz; u8 max_hfreq_khz; u8 pixel_clock_mhz; /* need to multiply by 10 */ u8 flags; union { struct { u8 reserved; u8 hfreq_start_khz; /* need to multiply by 2 */ u8 c; /* need to divide by 2 */ __le16 m; u8 k; u8 j; /* need to divide by 2 */ } __attribute__((packed)) gtf2; struct { u8 version; u8 data1; /* high 6 bits: extra clock resolution */ u8 data2; /* plus low 2 of above: max hactive */ u8 supported_aspects; u8 flags; /* preferred aspect and blanking support */ u8 supported_scalings; u8 preferred_refresh; } __attribute__((packed)) cvt; } formula; } __attribute__((packed)); struct detailed_data_wpindex { u8 white_yx_lo; /* Lower 2 bits each */ u8 white_x_hi; u8 white_y_hi; u8 gamma; /* need to divide by 100 then add 1 */ } __attribute__((packed)); struct detailed_data_color_point { u8 windex1; u8 wpindex1[3]; u8 windex2; u8 wpindex2[3]; } __attribute__((packed)); struct cvt_timing { u8 code[3]; } __attribute__((packed)); struct detailed_non_pixel { u8 pad1; u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name fb=color point data, fa=standard timing data, f9=undefined, f8=mfg. reserved */ u8 pad2; union { struct detailed_data_string str; struct detailed_data_monitor_range range; struct detailed_data_wpindex color; struct std_timing timings[6]; struct cvt_timing cvt[4]; } data; } __attribute__((packed)); #define EDID_DETAIL_EST_TIMINGS 0xf7 #define EDID_DETAIL_CVT_3BYTE 0xf8 #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9 #define EDID_DETAIL_STD_MODES 0xfa #define EDID_DETAIL_MONITOR_CPDATA 0xfb #define EDID_DETAIL_MONITOR_NAME 0xfc #define EDID_DETAIL_MONITOR_RANGE 0xfd #define EDID_DETAIL_MONITOR_STRING 0xfe #define EDID_DETAIL_MONITOR_SERIAL 0xff struct detailed_timing { __le16 pixel_clock; /* need to multiply by 10 KHz */ union { struct detailed_pixel_timing pixel_data; struct detailed_non_pixel other_data; } data; } __attribute__((packed)); #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0) #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1) #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2) #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) #define DRM_EDID_INPUT_DIGITAL (1 << 7) #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) #define DRM_EDID_DIGITAL_TYPE_UNDEF (0) #define DRM_EDID_DIGITAL_TYPE_DVI (1) #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2) #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3) #define DRM_EDID_DIGITAL_TYPE_MDDI (4) #define DRM_EDID_DIGITAL_TYPE_DP (5) #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) /* If analog */ #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ /* If digital */ #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) #define DRM_EDID_FEATURE_RGB (0 << 3) #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) struct edid { u8 header[8]; /* Vendor & product info */ u8 mfg_id[2]; u8 prod_code[2]; u32 serial; /* FIXME: byte order */ u8 mfg_week; u8 mfg_year; /* EDID version */ u8 version; u8 revision; /* Display info: */ u8 input; u8 width_cm; u8 height_cm; u8 gamma; u8 features; /* Color characteristics */ u8 red_green_lo; u8 black_white_lo; u8 red_x; u8 red_y; u8 green_x; u8 green_y; u8 blue_x; u8 blue_y; u8 white_x; u8 white_y; /* Est. timings and mfg rsvd timings*/ struct est_timings established_timings; /* Standard timings 1-8*/ struct std_timing standard_timings[8]; /* Detailing timings 1-4 */ struct detailed_timing detailed_timings[4]; /* Number of 128 byte ext. blocks */ u8 extensions; /* Checksum */ u8 checksum; } __attribute__((packed)); #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) /* Short Audio Descriptor */ struct cea_sad { u8 format; u8 channels; /* max number of channels - 1 */ u8 freq; u8 byte2; /* meaning depends on format */ }; struct drm_encoder; struct drm_connector; struct drm_display_mode; struct hdmi_avi_infoframe; void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid); int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads); int drm_av_sync_delay(struct drm_connector *connector, struct drm_display_mode *mode); struct drm_connector *drm_select_eld(struct drm_encoder *encoder, struct drm_display_mode *mode); int drm_load_edid_firmware(struct drm_connector *connector); int drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, const struct drm_display_mode *mode); #endif /* __DRM_EDID_H__ */ href='#n164'>164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 
/*
 * This file is part of the flashrom project.
 *
 * Copyright (C) 2021 3mdeb Embedded Systems Consulting
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <include/test.h>
#include <stdio.h>
#include <string.h>

#include "chipdrivers.h"
#include "flash.h"
#include "libflashrom.h"
#include "programmer.h"
#include "tests.h"

/*
 * Tests in this file do not use any mocking, because using write-protect
 * emulation in dummyflasher programmer is sufficient
 */

#define LAYOUT_TAIL_REGION_START 0x1000

static void setup_chip(struct flashrom_flashctx *flash, struct flashrom_layout **layout,
		       struct flashchip *chip, const char *programmer_param)
{
	flash->chip = chip;

	if (layout) {
		const size_t tail_start = LAYOUT_TAIL_REGION_START;
		const size_t tail_len = chip->total_size * KiB - 1;

		assert_int_equal(0, flashrom_layout_new(layout));
		assert_int_equal(0, flashrom_layout_add_region(*layout, 0, tail_start - 1, "head"));
		assert_int_equal(0, flashrom_layout_add_region(*layout, tail_start, tail_len, "tail"));

		flashrom_layout_set(flash, *layout);
	}

	assert_int_equal(0, programmer_init(&programmer_dummy, programmer_param));
	/* Assignment below normally happens while probing, but this test is not probing. */
	flash->mst = &registered_masters[0];
}

static void teardown(struct flashrom_layout **layout)
{
	assert_int_equal(0, programmer_shutdown());
	if (layout)
		flashrom_layout_release(*layout);
}

/* Setup the struct for W25Q128.V, all values come from flashchips.c */
static const struct flashchip chip_W25Q128_V = {
	.vendor		= "aklm&dummyflasher",
	.total_size	= 16 * 1024,
	.page_size	= 1024,
	.tested		= TEST_OK_PREW,
	.read		= SPI_CHIP_READ,
	.write		= SPI_CHIP_WRITE256,
	.unlock         = spi_disable_blockprotect,
	.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3,
	.block_erasers  =
	{
		{
			.eraseblocks = { {4 * 1024, 4096} },
			.block_erase = SPI_BLOCK_ERASE_20,
		}, {
			.eraseblocks = { {32 * 1024, 512} },
			.block_erase = SPI_BLOCK_ERASE_52,
		}, {
			.eraseblocks = { {64 * 1024, 256} },
			.block_erase = SPI_BLOCK_ERASE_D8,
		}, {
			.eraseblocks = { {16 * 1024 * 1024, 1} },
			.block_erase = SPI_BLOCK_ERASE_60,
		}, {
			.eraseblocks = { {16 * 1024 * 1024, 1} },
			.block_erase = SPI_BLOCK_ERASE_C7,
		}
	},
	.reg_bits	=
	{
		.srp    = {STATUS1, 7, RW},
		.srl    = {STATUS2, 0, RW},
		.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
		.tb     = {STATUS1, 5, RW},
		.sec    = {STATUS1, 6, RW},
		.cmp    = {STATUS2, 6, RW},
		.wps    = {STATUS3, 2, RW},
	},
	.decode_range	= DECODE_RANGE_SPI25,
};

/* Trying to set an unsupported WP range fails */
void invalid_wp_range_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,hwwp=no");

	struct flashrom_flashctx flash = { 0 };
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	setup_chip(&flash, NULL, &mock_chip, param_dup);

	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);
	flashrom_wp_set_range(wp_cfg, 0x1000, 0x1000);

	assert_int_equal(FLASHROM_WP_ERR_RANGE_UNSUPPORTED, flashrom_wp_write_cfg(&flash, wp_cfg));

	teardown(NULL);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}

/* Enabling hardware WP with a valid range succeeds */
void set_wp_range_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,hwwp=no");

	struct flashrom_flashctx flash = { 0 };
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	size_t start;
	size_t len;

	setup_chip(&flash, NULL, &mock_chip, param_dup);

	/* Use last 4 KiB for a range. */
	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);
	flashrom_wp_set_range(wp_cfg, mock_chip.total_size * KiB - 4 * KiB, 4 * KiB);

	assert_int_equal(0, flashrom_wp_write_cfg(&flash, wp_cfg));

	/* Check that range was set correctly. */
	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));
	flashrom_wp_get_range(&start, &len, wp_cfg);
	assert_int_equal(16 * MiB - 4 * KiB, start);
	assert_int_equal(4 * KiB, len);

	teardown(NULL);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}

/* Enable hardware WP and verify that it can not be unset */
void switch_wp_mode_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,hwwp=yes");

	struct flashrom_flashctx flash = { 0 };
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	setup_chip(&flash, NULL, &mock_chip, param_dup);

	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));

	/* Check initial mode. */
	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));
	assert_int_equal(FLASHROM_WP_MODE_DISABLED, flashrom_wp_get_mode(wp_cfg));

	/* Enable hardware protection, which can't be unset because simulated
	   HW WP pin is in active state. */
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);
	assert_int_equal(0, flashrom_wp_write_cfg(&flash, wp_cfg));
	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));
	assert_int_equal(FLASHROM_WP_MODE_HARDWARE, flashrom_wp_get_mode(wp_cfg));

	/* Check that write-protection mode can't be unset. */
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_DISABLED);
	assert_int_equal(FLASHROM_WP_ERR_VERIFY_FAILED, flashrom_wp_write_cfg(&flash, wp_cfg));

	/* Final mode should be "hardware". */
	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));
	assert_int_equal(FLASHROM_WP_MODE_HARDWARE, flashrom_wp_get_mode(wp_cfg));

	teardown(NULL);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}

/* WP state is decoded correctly from status registers */
void wp_init_from_status_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	/*
	 * CMP  (S14) = 1 (range complement)
	 * SRP1 (S8)  = 1
	 * SRP0 (S7)  = 1 (`SRP1 == 1 && SRP0 == 1` is permanent mode)
	 * SEC  (S6)  = 1 (base unit is a 4 KiB sector)
	 * TB   (S5)  = 1 (bottom up range)
	 * BP2  (S4)  = 0
	 * BP1  (S3)  = 1
	 * BP0  (S2)  = 1 (bp: BP2-0 == 0b011 == 3)
	 *
	 * Range coefficient is `2 ** (bp - 1)`, which is 4 in this case.
	 * Multiplaying that by base unit gives 16 KiB protected region at the
	 * bottom (start of the chip), which is then complemented.
	 */
	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,spi_status=0x41ec");

	struct flashrom_flashctx flash = { 0 };
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	size_t start;
	size_t len;

	setup_chip(&flash, NULL, &mock_chip, param_dup);

	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));

	/* Verify that WP mode reflects SPI status */
	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));
	assert_int_equal(FLASHROM_WP_MODE_PERMANENT, flashrom_wp_get_mode(wp_cfg));
	flashrom_wp_get_range(&start, &len, wp_cfg);
	assert_int_equal(0x004000, start);
	assert_int_equal(0xffc000, len);

	teardown(NULL);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}

/* Enabled WP makes full chip erasure fail */
void full_chip_erase_with_wp_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	struct flashrom_flashctx flash = { 0 };
	struct flashrom_layout *layout;
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,hwwp=yes");

	setup_chip(&flash, &layout, &mock_chip, param_dup);
	/* Layout regions are created by setup_chip(). */
	assert_int_equal(0, flashrom_layout_include_region(layout, "head"));
	assert_int_equal(0, flashrom_layout_include_region(layout, "tail"));

	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));

	/* Write protection takes effect only after changing SRP values, so at
	   this stage WP is not enabled and erase completes successfully. */
	assert_int_equal(0, flashrom_flash_erase(&flash));

	/* Write non-erased value to entire chip so that erase operations cannot
	 * be optimized away. */
	unsigned long size = flashrom_flash_getsize(&flash);
	uint8_t *const contents = malloc(size);
	memset(contents, UNERASED_VALUE(&flash), size);
	assert_int_equal(0, flashrom_image_write(&flash, contents, size, NULL));
	free(contents);

	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));

	/* Hardware-protect first 4 KiB. */
	flashrom_wp_set_range(wp_cfg, 0, 4 * KiB);
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);

	assert_int_equal(0, flashrom_wp_write_cfg(&flash, wp_cfg));

	/* Try erasing the chip again. Now that WP is active, the first 4 KiB is
	   protected and we're trying to erase the whole chip, erase should
	   fail. */
	assert_int_equal(1, flashrom_flash_erase(&flash));

	teardown(&layout);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}

/* Enabled WP does not block erasing unprotected parts of the chip */
void partial_chip_erase_with_wp_dummyflasher_test_success(void **state)
{
	(void) state; /* unused */

	struct flashrom_flashctx flash = { 0 };
	struct flashrom_layout *layout;
	struct flashchip mock_chip = chip_W25Q128_V;
	struct flashrom_wp_cfg *wp_cfg;

	char *param_dup = strdup("bus=spi,emulate=W25Q128FV,hwwp=yes");

	setup_chip(&flash, &layout, &mock_chip, param_dup);
	/* Layout region is created by setup_chip(). */
	assert_int_equal(0, flashrom_layout_include_region(layout, "tail"));

	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));

	assert_int_equal(0, flashrom_wp_read_cfg(wp_cfg, &flash));

	/* Hardware-protect head region. */
	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);
	flashrom_wp_set_range(wp_cfg, 0, LAYOUT_TAIL_REGION_START);

	assert_int_equal(0, flashrom_wp_write_cfg(&flash, wp_cfg));

	/* First 4 KiB is the only protected part of the chip and the region
	   we included covers only unprotected part, so erase operation should
	   succeed. */
	assert_int_equal(0, flashrom_flash_erase(&flash));

	teardown(&layout);

	flashrom_wp_cfg_release(wp_cfg);
	free(param_dup);
}
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