From 11a35980defbf800e33e77cc7a82e89c33865b25 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 10 Jul 2020 17:04:10 +0200 Subject: Add Gemini Lake support The SPI hardware is pretty much unchanged from Apollo Lake. However, the IFD differs significantly enough to require special handling. Signed-off-by: Angel Pons Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77 Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276 Reviewed-by: Edward O'Callaghan Tested-by: build bot (Jenkins) --- util/ich_descriptors_tool/ich_descriptors_tool.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'util') diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 32eea12c..bfeedc18 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -127,6 +127,7 @@ static void usage(char *argv[], const char *error) "\t- \"ich10\",\n" "\t- \"silvermont\" for chipsets from Intel's Silvermont architecture (e.g. Bay Trail),\n" "\t- \"apollo\" for Intel's Apollo Lake SoC.\n" +"\t- \"gemini\" for Intel's Gemini Lake SoC.\n" "\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n" "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n" "\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n" @@ -230,6 +231,8 @@ int main(int argc, char *argv[]) cs = CHIPSET_400_SERIES_COMET_POINT; else if (strcmp(csn, "apollo") == 0) cs = CHIPSET_APOLLO_LAKE; + else if (strcmp(csn, "gemini") == 0) + cs = CHIPSET_GEMINI_LAKE; } ret = read_ich_descriptors_from_dump(buf, len, &cs, &desc); -- cgit v1.2.3