From 7e4968525d37d87e8b6f8b848e4f2f9696926237 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Tue, 11 May 2021 17:38:14 +0200 Subject: programmer: Smoothen register_spi_master() API It was impossible to register a const struct spi_master that would point to dynamically allocated `data`. Fix that so that we won't have to create more mutable globals. Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066 Tested-by: build bot (Jenkins) Reviewed-by: Anastasia Klimchuk Reviewed-by: Angel Pons --- ichspi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'ichspi.c') diff --git a/ichspi.c b/ichspi.c index e45b39a6..613f3fc3 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1812,7 +1812,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) } ich_init_opcodes(ich_gen); ich_set_bbar(0, ich_gen); - register_spi_master(&spi_master_ich7); + register_spi_master(&spi_master_ich7, NULL); break; case CHIPSET_ICH8: default: /* Future version might behave the same */ @@ -2041,7 +2041,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) register_opaque_master(&opaque_master_ich_hwseq); } else { - register_spi_master(&spi_master_ich9); + register_spi_master(&spi_master_ich9, NULL); } break; } @@ -2071,7 +2071,7 @@ int via_init_spi(uint32_t mmio_base) /* Not sure if it speaks all these bus protocols. */ internal_buses_supported &= BUS_LPC | BUS_FWH; ich_generation = CHIPSET_ICH7; - register_spi_master(&spi_master_via); + register_spi_master(&spi_master_via, NULL); msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); -- cgit v1.2.3