From 34323495319fe20da7b7f7585fd70f0edcb8c53a Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 4 Oct 2018 14:59:40 +0200 Subject: flashchips: Add W25Q128.V..W Port the code from chromeos flashrom. Tested using W25Q128JVSIM in SPI mode. Change-Id: I38397a0c831407afa21cddca8485664576fce92c Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/28910 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- flashchips.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'flashchips.c') diff --git a/flashchips.c b/flashchips.c index d2773d62..e066e03f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -15429,6 +15429,43 @@ const struct flashchip flashchips[] = { .voltage = {2700, 3600}, }, + { + .vendor = "Winbond", + .name = "W25Q128.V..M", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q128_V_M, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + { .vendor = "Winbond", .name = "W25Q256.V", -- cgit v1.2.3