From e65aa96fd35f8734f44e8f854838fc59bdd599db Mon Sep 17 00:00:00 2001 From: Evgeny Zinoviev Date: Mon, 9 Mar 2020 03:05:42 +0300 Subject: chipset_enable: Mark Intel HM75 as DEP Tested reading and writing on a Samsung laptop (see CB:39388). Change-Id: Idbb9c719a6f794a35293bb3b167cc1491d24d4fa Signed-off-by: Evgeny Zinoviev Reviewed-on: https://review.coreboot.org/c/flashrom/+/39389 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- chipset_enable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chipset_enable.c b/chipset_enable.c index 4afb0e44..ae8269a2 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1832,7 +1832,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1e57, B_FS, DEP, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, B_FS, NT, "Intel", "UM77", enable_flash_pch7}, {0x8086, 0x1e59, B_FS, DEP, "Intel", "HM76", enable_flash_pch7}, - {0x8086, 0x1e5d, B_FS, NT, "Intel", "HM75", enable_flash_pch7}, + {0x8086, 0x1e5d, B_FS, DEP, "Intel", "HM75", enable_flash_pch7}, {0x8086, 0x1e5e, B_FS, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, B_FS, DEP, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x1f38, B_FS, DEP, "Intel", "Avoton/Rangeley", enable_flash_silvermont}, -- cgit v1.2.3