From b1f858f65b2abd276542650d8cb9e382da258967 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 12 Aug 2020 12:48:06 -0500 Subject: Add support for Comet Lake-U/400-series PCH Add enum CHIPSET_400_SERIES_COMET_POINT and treat it identically to CHIPSET_300_SERIES_CANNON_POINT. Add PCI IDs for Comet Lake, CML-U Premium and classify as CHIPSET_400_SERIES_COMET_POINT. Test: read/write unlocked CML-U board Change-Id: I43b4ad1eecfed16fec59863e46d4e997fbe45f1b Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/flashrom/+/44420 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Felix Singer --- chipset_enable.c | 9 +++++++++ ich_descriptors.c | 10 +++++++++- ichspi.c | 11 ++++++++++- programmer.h | 1 + util/ich_descriptors_tool/ich_descriptors_tool.c | 3 +++ 5 files changed, 32 insertions(+), 2 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 96d9df38..9769ba45 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -599,6 +599,7 @@ static enum chipbustype enable_flash_ich_report_gcs( case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: reg_name = "BIOS_SPI_BC"; gcs = pci_read_long(dev, 0xdc); @@ -694,6 +695,7 @@ static enum chipbustype enable_flash_ich_report_gcs( case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: boot_straps = boot_straps_pch8_lp; break; case CHIPSET_APOLLO_LAKE: @@ -722,6 +724,7 @@ static enum chipbustype enable_flash_ich_report_gcs( case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: bbs = (gcs >> 6) & 0x1; break; @@ -963,6 +966,11 @@ static int enable_flash_pch300(struct pci_dev *const dev, const char *const name return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT); } +static int enable_flash_pch400(struct pci_dev *const dev, const char *const name) +{ + return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT); +} + static int enable_flash_apl(struct pci_dev *const dev, const char *const name) { return enable_flash_pch100_or_c620(dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE); @@ -2004,6 +2012,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x9d56, B_S, NT, "Intel", "Kaby Lake Y Premium", enable_flash_pch100}, {0x8086, 0x9d58, B_S, NT, "Intel", "Kaby Lake U Premium", enable_flash_pch100}, {0x8086, 0x9d84, B_S, DEP, "Intel", "Cannon Lake U Premium", enable_flash_pch300}, + {0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, diff --git a/ich_descriptors.c b/ich_descriptors.c index 7409a223..7374984d 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -42,6 +42,7 @@ ssize_t ich_number_of_regions(const enum ich_chipset cs, const struct ich_desc_c return 6; case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: return 16; case CHIPSET_100_SERIES_SUNRISE_POINT: return 10; @@ -196,6 +197,7 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: { uint8_t size_enc; if (idx == 0) { @@ -264,6 +266,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value) case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: return freq_str[1][value]; case CHIPSET_APOLLO_LAKE: return freq_str[2][value]; @@ -281,6 +284,7 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_ case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: has_flill1 = true; break; @@ -399,7 +403,8 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i msg_pdbg2("--- Details ---\n"); if (cs == CHIPSET_100_SERIES_SUNRISE_POINT || - cs == CHIPSET_300_SERIES_CANNON_POINT) { + cs == CHIPSET_300_SERIES_CANNON_POINT || + cs == CHIPSET_400_SERIES_COMET_POINT) { const char *const master_names[] = { "BIOS", "ME", "GbE", "unknown", "EC", }; @@ -961,6 +966,7 @@ static enum ich_chipset guess_ich_chipset(const struct ich_desc_content *const c switch (guess) { case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: /* `freq_read` was repurposed, so can't check on it any more. */ return guess; case CHIPSET_100_SERIES_SUNRISE_POINT: @@ -1115,6 +1121,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: if (idx == 0) { size_enc = desc->component.dens_new.comp1_density; @@ -1150,6 +1157,7 @@ static uint32_t read_descriptor_reg(enum ich_chipset cs, uint8_t section, uint16 case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: mmio_le_writel(control, spibar + PCH100_REG_FDOC); return mmio_le_readl(spibar + PCH100_REG_FDOD); diff --git a/ichspi.c b/ichspi.c index 4dbe69aa..4209d603 100644 --- a/ichspi.c +++ b/ichspi.c @@ -399,6 +399,7 @@ static void prettyprint_ich9_reg_hsfs(uint16_t reg_val, enum ich_chipset ich_gen case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: break; default: pprint_reg(HSFS, BERASE, reg_val, ", "); @@ -409,6 +410,7 @@ static void prettyprint_ich9_reg_hsfs(uint16_t reg_val, enum ich_chipset ich_gen case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: pprint_reg(HSFS, PRR34_LOCKDN, reg_val, ", "); pprint_reg(HSFS, WRSDIS, reg_val, ", "); break; @@ -428,6 +430,7 @@ static void prettyprint_ich9_reg_hsfc(uint16_t reg_val, enum ich_chipset ich_gen case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: _pprint_reg(HSFC, PCH100_HSFC_FCYCLE, PCH100_HSFC_FCYCLE_OFF, reg_val, ", "); pprint_reg(HSFC, WET, reg_val, ", "); break; @@ -1741,6 +1744,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: num_pr = 6; /* Includes GPR0 */ reg_pr0 = PCH100_REG_FPR0; @@ -1772,6 +1776,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) num_freg = 12; /* 12 MMIO regs, but 16 regions in FD spec */ break; case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: num_freg = 16; break; @@ -1867,6 +1872,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: tmp = mmio_readl(spibar + PCH100_REG_DLOCK); msg_pdbg("0x0c: 0x%08x (DLOCK)\n", tmp); @@ -1941,6 +1947,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: case CHIPSET_BAYTRAIL: break; @@ -1973,6 +1980,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_100_SERIES_SUNRISE_POINT: case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: break; default: @@ -2004,7 +2012,8 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) if (ich_spi_mode == ich_auto && (ich_gen == CHIPSET_100_SERIES_SUNRISE_POINT || - ich_gen == CHIPSET_300_SERIES_CANNON_POINT)) { + ich_gen == CHIPSET_300_SERIES_CANNON_POINT || + ich_gen == CHIPSET_400_SERIES_COMET_POINT)) { msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n"); ich_spi_mode = ich_hwseq; } diff --git a/programmer.h b/programmer.h index 73d37f88..9a7892d7 100644 --- a/programmer.h +++ b/programmer.h @@ -671,6 +671,7 @@ enum ich_chipset { CHIPSET_C620_SERIES_LEWISBURG, CHIPSET_300_SERIES_CANNON_POINT, CHIPSET_APOLLO_LAKE, + CHIPSET_400_SERIES_COMET_POINT, }; /* ichspi.c */ diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 6f13749b..32eea12c 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -225,6 +225,9 @@ int main(int argc, char *argv[]) else if ((strcmp(csn, "300") == 0) || (strcmp(csn, "cannon") == 0)) cs = CHIPSET_300_SERIES_CANNON_POINT; + else if ((strcmp(csn, "400") == 0) || + (strcmp(csn, "comet") == 0)) + cs = CHIPSET_400_SERIES_COMET_POINT; else if (strcmp(csn, "apollo") == 0) cs = CHIPSET_APOLLO_LAKE; } -- cgit v1.2.3