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* Some functions take no argumentsCarl-Daniel Hailfinger2009-05-011-5/+5
| | | | | | | | | | Make that explicit in the associated prototypes. This avoids a warning on some compilers and is a correctness issue. Corresponding to flashrom svn r449. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Handle DragonFly BSD definitions in flash.hPatrick Georgi2009-04-281-1/+1
| | | | | | | | | | | There are still some tweaks necessary to get flashrom to build on DragonFly, but this helps a lot. Corresponding to flashrom svn r445. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* MAX may already be definedUwe Hermann2009-04-241-5/+3
| | | | | | | | | Also, fix smaller cosmetics Corresponding to flashrom svn r442 and coreboot v2 svn r4205. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Support MX25L3235DStephan Guilloux2009-04-231-1/+1
| | | | | | | Corresponding to flashrom svn r441 and coreboot v2 svn r4200. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* Support Macronix MX2512805D flash chipStephan Guilloux2009-04-211-0/+1
| | | | | | | Corresponding to flashrom svn r437 and coreboot v2 svn r4150. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* FreeBSD definitions of (read|write)[bwl] collide with our ownCarl-Daniel Hailfinger2009-03-061-6/+6
| | | | | | | | | | | | Before we attempt trickery, we can simply rename the accessor functions. Patch created with the help of Coccinelle. Corresponding to flashrom svn r420 and coreboot v2 svn r3984. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Patrick Georgi <patrick@georgi-clan.de>
* Use helper functions to access flash chipsCarl-Daniel Hailfinger2009-03-051-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now we perform direct pointer manipulation without any abstraction to read from and write to memory mapped flash chips. That makes it impossible to drive any flasher which does not mmap the whole chip. Using helper functions readb() and writeb() allows a driver for external flash programmers like Paraflasher to replace readb and writeb with calls to its own chip access routines. This patch has the additional advantage of removing lots of unnecessary casts to volatile uint8_t * and now-superfluous parentheses which caused poor readability. I used the semantic patcher Coccinelle to create this patch. The semantic patch follows: @@ expression a; typedef uint8_t; volatile uint8_t *b; @@ - *(b) = (a); + writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + readb(b) @@ type T; T b; @@ ( readb | writeb ) (..., - (T) - (b) + b ) In contrast to a sed script, the semantic patch performs type checking before converting anything. Tested-by: Joe Julian Corresponding to flashrom svn r418 and coreboot v2 svn r3971. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
* Driver for ST M29F002T/NT/BPeter Stuge2009-01-261-0/+5
| | | | | | | | | | | T/NT TEST_OK_ PROBE READ ERASE WRITE Test report from Julia. Thanks! Corresponding to flashrom svn r409 and coreboot v2 svn r3917. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Julia Longtin <juri@solarnetone.org>
* SST25VF040B using 0x90 identification and AAI writePeter Stuge2009-01-261-0/+1
| | | | | | | | | | | | | SST AAI is Auto Address Increment writing, a streamed write to the flash chip where the first write command sets a starting address and following commands simply append data. Unfortunately not supported by Winbond SPI masters. From July 2008. Corresponding to flashrom svn r407 and coreboot v2 svn r3913. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Winbond SuperIO SPI driverPeter Stuge2009-01-261-1/+8
| | | | | | | | | | Developed and tested to work on Intel D201GLY in July 2008. Tested by a helpful person on IRC whose name I've since forgotten. Sorry! Corresponding to flashrom svn r404 and coreboot v2 svn r3910. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Export Winbond SuperIO register access functions in board_enable.cPeter Stuge2009-01-261-0/+5
| | | | | | | Corresponding to flashrom svn r403 and coreboot v2 svn r3909. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Darwin / Mac OS XStefan Reinauer2009-01-261-0/+9
| | | | | | | | | | | Through DirectIO from coresystems GmbH we now support Darwin/Mac OS X. DirectIO is available at http://www.coresystems.de/en/directio Corresponding to flashrom svn r399 and coreboot v2 svn r3905. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() callStefan Reinauer2009-01-261-10/+4
| | | | | | | | Corresponding to flashrom svn r397 and coreboot v2 svn r3903. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Change flashrom.c:map_flash_registers() from int to voidPeter Stuge2009-01-261-1/+1
| | | | | | | | | The function exit()s on failure, and no callers check the return value. Corresponding to flashrom svn r396 and coreboot v2 svn r3901. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Change FreeBSD #ifdef into #if defined()Stefan Reinauer2009-01-261-1/+1
| | | | | | | Corresponding to flashrom svn r393 and coreboot v2 svn r3898. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se>
* Check all mmap() calls and print helpful Linux error messagePeter Stuge2009-01-231-0/+1
| | | | | | | Corresponding to flashrom svn r386 and coreboot v2 svn r3890. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Add SST49LF020 supportSven Schnelle2009-01-071-0/+1
| | | | | | | Corresponding to flashrom svn r373 and coreboot v2 svn r3850. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Various ichspi.c refinementsFENG yu ning2008-12-151-8/+1
| | | | | | | | | | | | | | | | | | | | * add a generic preop-opcode-pair table. * rename ich_check_opcodes to ich_init_opcodes. * let ich_init_opcodes do not need to access flashchip structure: . move the definition of struct preop_opcode_pair to a better place . remove preop_opcode_pairs from 'struct flashchip' . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure * call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works. * fix a coding style mistake. Corresponding to flashrom svn r367 and coreboot v2 svn r3814. Signed-off-by: FENG yu ning <fengyuning1984@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Add 28 flash chips of the MX29 series to the flashrom ID table and support ↵Carl-Daniel Hailfinger2008-12-101-0/+28
| | | | | | | | | | | the MX29LV040C MX29LV040C probe and read support tested by khetzal on IRC. Corresponding to flashrom svn r366 and coreboot v2 svn r3809. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI ↵FENG yu ning2008-12-081-0/+8
| | | | | | | | | configuration is locked down Corresponding to flashrom svn r364 and coreboot v2 svn r3805. Signed-off-by: FENG yu ning <fengyuning1984@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add RDID/REMS IDs for the following flash chipsCarl-Daniel Hailfinger2008-12-041-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SST_25VF512A_REMS SST_25VF010_REMS SST_25VF020_REMS SST_25VF040_REMS SST_25VF040B_REMS SST_25VF080_REMS SST_25VF080B_REMS SST_25VF032B_REMS SST_26VF016 SST_26VF032 W_25X16 W_25X32 W_25X64 Straight from the data sheets. The REMS IDs help in case the RDID opcode is unavailable (due to opcode lockdown) or unsupported by the chip. Some day, we need to pair probe functions together with IDs. Multiple pairs can exist per chip and duplicating chip definitions does not really make sense. Corresponding to flashrom svn r358 and coreboot v2 svn r3793. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Replace #ifdefs for sc520 systems by run time probingStefan Reinauer2008-12-031-0/+2
| | | | | | | | | | Fixes #109 Corresponding to flashrom svn r355 and coreboot v2 svn r3790. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Do not indicate known-bad functions as untestedCarl-Daniel Hailfinger2008-11-281-1/+2
| | | | | | | | | | | If a chip has any TEST_BAD_* flag set, we don't even list the unsupported functions, giving the user the impression that the unsupported functions are tested. Corresponding to flashrom svn r352 and coreboot v2 svn r3780. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add support for the AMD/ATI SB600 southbridge SPI functionalityJason Wang2008-11-281-0/+9
| | | | | | | | | | This has been tested by Uwe Hermann on an RS690/SB600 board. Corresponding to flashrom svn r351 and coreboot v2 svn r3779. Signed-off-by: Jason Wang <Qingpei.Wang@amd.com> Reviewed-by: Joe Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom already has the following probe functionsCarl-Daniel Hailfinger2008-11-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | - probe_spi_rdid with opcode 0x9f, usually 3 bytes ID - probe_spi_res with opcode 0xab, usually 1 byte ID We are missing the following probe function: - probe_spi_rems with opcode 0x90, usually 2 bytes ID RDID provides best specifity (manufacturer, device class and device) and RES is supported by quite a few old chips. However, RES only returns one byte and there are multiple flash chips with different sizes on the market and all of them have the same RES ID. REMS is from the same age as RES, but it provides a manufacturer and a device ID. It is therefore on par with the probing for parallel flash chips and specific enough. The order in which chips should be detected is as follows: 1. RDID 2. REMS 3. RES Corresponding to flashrom svn r349 and coreboot v2 svn r3775. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Check for failed SPI command executionCarl-Daniel Hailfinger2008-11-181-4/+5
| | | | | | | | | | | | | | | | | | | | | | | Although SPI itself does not have a mechanism to signal command failure, the SPI host may be unable to send a given command over the wire due to security or hardware limitations. The current code ignores these mechanisms completely and simply assumes almost every command succeeds. Complain if SPI command execution fails. Since locked down Intel chipsets (like the one we had problems with earlier) only allow a small subset of commands, find the common subset of commands between the chipset and the ROM in the chip erase case. That is accomplished by the new spi_chip_erase_60_c7() which can be used for chips supporting both 0x60 and 0xc7 chip erase commands. Both parts of the patch address problems seen in the real world. The increased verbosity for the error case will help us diagnose and address problems better. Corresponding to flashrom svn r345 and coreboot v2 svn r3757. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Otherwise: Acked-by: Stefan Reinauer <stepan@coresystems.de>
* The AT25 and AT26 series SPI chips from Atmel are plain EEPROMsCarl-Daniel Hailfinger2008-11-151-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT45 series SPI chips are DataFlash EEPROMs which means they have odd (non-power-of-two) sector sizes, but some of the DataFlash chips can be configured or ordered with power-of-two sector sizes. Add probe support for the following Atmel SPI chips: AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321A AT25DF641 AT25F512B AT25FS010 AT25FS040 AT26DF041 AT26DF081A AT26DF161 AT26DF161A AT26DF321 AT26F004 AT45CS1282 AT45DB011D AT45DB021D AT45DB041D AT45DB081D AT45DB161D AT45DB321C AT45DB321D AT45DB642D Add an explanation why the following chips can't be probed: AT45BR3214B AT45D011 AT45D021A AT45D041A AT45D081A AT45D161 AT45DB011 AT45DB011B AT45DB021A AT45DB021B AT45DB041A AT45DB081A AT45DB161 AT45DB161B AT45DB321 AT45DB321B AT45DB642 Add the ID, but no probing function for this chip: AT25F512A Corresponding to flashrom svn r342 and coreboot v2 svn r3754. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Myles Watson <mylesgw@gmail.com>
* Add support for 8 new chips and fix up 2 existing chips as wellCarl-Daniel Hailfinger2008-11-041-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Replace age-old TODO comments with real explanations. Fixed chips: Fujitsu MBM29F400TC (ID definition) Macronix MX29F002T (chip name) New chips: Fujitsu MBM29F004BC Fujitsu MBM29F004TC Fujitsu MBM29F400BC Macronix MX25L512 Macronix MX25L1005 Macronix MX25L2005 Macronix MX25L6405 Macronix MX29F002B Straight from the data sheets, compile tested only. Corresponding to flashrom svn r339 and coreboot v2 svn r3730. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add additional SPI sector erase and chip erase command functionsCarl-Daniel Hailfinger2008-11-031-0/+3
| | | | | | | | | | | | | | | | | | | Not all chips support all commands, so allow the implementer to select the matching function. Fix a layering violation in ICH SPI code to be less bad. Still not perfect, but the new code is shorter, more generic and architecturally more sound. TODO (in a separate patch): - move the generic sector erase code to spi.c - decide which erase command to use based on info about the chip - create a generic spi_erase_all_sectors function which calls the generic sector erase function Thanks to Stefan for reviewing and commenting. Corresponding to flashrom svn r337 and coreboot v2 svn r3722. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for the ST M50FW002 chipCarl-Daniel Hailfinger2008-11-021-0/+1
| | | | | | | | | | | Identification only, erase/write are not implemented. Corresponding to flashrom svn r335 and coreboot v2 svn r3717. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> tested and Acked-by: Elia Yehuda <z4ziggy@gmail.com>
* Flashrom support for some Numonyx parts (M25PE)Stefan Reinauer2008-10-291-0/+1
| | | | | | | | | Using block erase d8 as discussed with Peter Stuge Corresponding to flashrom svn r333 and coreboot v2 svn r3707. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Coding-style fixes for flashrom, partly indent-aidedUwe Hermann2008-10-181-10/+16
| | | | | | | Corresponding to flashrom svn r326 and coreboot v2 svn r3669. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Support for AM29F002(N)B[BT]Mats Erik Andersson2008-10-071-0/+2
| | | | | | | | | | | | | Fully tested on AM29F002NBT. Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Corresponding to flashrom svn r321 and coreboot v2 svn r3639. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Activate proper support for EN29F002(A)(N)[BT]Mats Erik Andersson2008-09-261-0/+5
| | | | | | | | | | | | Fully tested for Probe/Read/Erase/Write on EN29F002NT. Jedec subroutines 'probe_jedec()' and 'erase_chip_jedec()' are still in use, but a tailored 'write_en29f002a()' is needed due to a byte wise writing mechanism for this chip. Corresponding to flashrom svn r316 and coreboot v2 svn r3602. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Winbond W39V040C and MSI K8T Neo2-FPeter Stuge2008-07-211-0/+5
| | | | | | | | | | | | | | | W39V040C does standard JEDEC commands except chip erase so add a small driver. probe_w39v040c() prints the block lock pin status when a chip is found. The Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs. Many thanks to Daniel McLellan for testing all of this on hardware! Build tested by Uwe. Corresponding to flashrom svn r304 and coreboot v2 svn r3431. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Trivial SPI cleanupsPeter Stuge2008-07-071-2/+0
| | | | | | | | | | | | | | | | | While writing a new SPI driver I fixed some things in the SPI code: All calls to spi_command() had unneccessary #define duplications, and in some cases the read count define could theoretically become harmful because NULL was passed for the read buffer. Avoid a crash, should someone change the #defines. I also noticed that the only caller of spi_page_program() was the it87 driver, and spi_page_program() could only call back into the it87 driver. Removed the function for easier-to-follow code and made it8716f_spi_page_program() static. The ichspi driver's static page functions are already static. Corresponding to flashrom svn r302 and coreboot v2 svn r3418. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* r3415 removed symbolic constants for device IDs by accidentCarl-Daniel Hailfinger2008-07-061-0/+3
| | | | | | | | | | Flash.h is a database of known IDs, whereas flashchips.c is a database of chips for which support has been implemented. Keep it that way. Corresponding to flashrom svn r300 and coreboot v2 svn r3416. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add AMIC A29002Andreas Thienemann2008-07-061-1/+0
| | | | | | | | | | | | | | | | | | | This patch adds support to the AMIC A29002 chip in its top and bottom configuration to flashrom. Additionally, the alphabetic order of the AMIC chips was fixed. The datasheet is at <http://www.amictechnology.com/pdf/A29002.pdf>. A29002T PREW functionality was tested and works. This flash chip has asymmetric sector layout so it is important to use the mx29f002 driver, which does chip erase before writing, rather than am29f040b, which uses sector erase. Corresponding to flashrom svn r299 and coreboot v2 svn r3415. Signed-off-by: Andreas Thienemann <andreas@bawue.net> Acked-by: Peter Stuge <peter@stuge.se>
* First attempt to clean up SPI probing and create a common construct: the ↵Stefan Reinauer2008-06-301-4/+11
| | | | | | | | | | | | | | | | | | flash bus At some point the flash bus will be part of struct flashchip. Pardon me for pushing this in, but I think it is important to beware of further decay and it will improve things for other developers in the short run. Carl-Daniel, I will consider your suggestions in another patch. I want to keep things from getting too much for now. The patch includes Rudolf's VIA SPI changes though. Corresponding to flashrom svn r285 and coreboot v2 svn r3401. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Mine AMIC flash chip needs 4 bytes RDIDRudolf Marek2008-06-301-0/+1
| | | | | | | | | Following patch adds support for that. Corresponding to flashrom svn r283 and coreboot v2 svn r3399. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se>
* This patch adds support for VIA SPI controller on VT8237SRudolf Marek2008-06-301-0/+1
| | | | | | | | | It is similar with few documented exceptions to ICH7 SPI controller. Corresponding to flashrom svn r282 and coreboot v2 svn r3398. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se>
* Multiple unrelated changesStefan Reinauer2008-06-271-0/+1
| | | | | | | | | | | | * ICH7 SPI support * fix some variable names in ichspi.c (Offset -> offset) * Dump ICH7 SPI bar with -V * Improve error message in case IOPL goes wrong. (It might not even be an IOPL) Corresponding to flashrom svn r278 and coreboot v2 svn r3393. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se>
* Remove dead M-Systems Disk on Chip codePeter Stuge2008-06-221-5/+0
| | | | | | | | | | | | | | DOC support has been disabled by default for many years. The write function does nothing but print text. It has a call to write_page_md2802() commented out, but that function does not exist. This is dead code with ugly #ifdefs. Updates README to reflect that there was a time when there was code, but it didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.* Corresponding to flashrom svn r269 and coreboot v2 svn r3382. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for AMIC Technology A49LF040A and do not probe W29EE011 anymoreJens Kuehnel2008-06-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Jens sent the first patch that added A49LF040A to flash.h and flashchips.c using _jedec and _49lf040 functions. An issue was found with probe_w29ee011() for the Winbond W29EE011, which caused the A49LF040A to no longer respond to any commands. Ward made a patch to disable probing by default for the W29EE011 following some discussion. Using -c W29EE011 will make flashrom probe for the chip. Peter did some more datasheet diving and found that the Pm49FL00x functions suited this chip quite well because of the block locking registers in A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3. Ward confirmed that this works on alix.2c3 too. Corresponding to flashrom svn r260 and coreboot v2 svn r3368. Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org> Signed-off-by: Ward Vandewege <ward@gnu.org> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Force read unknown flash chipsPeter Stuge2008-06-181-1/+1
| | | | | | | | | | | | | | | | | | | When flash chip detection fails, it is still useful and possible to read the flash chip contents. If no flash chip is found in normal probes and the -f -r -c CHIPNAME options are given, a successful probe for the specified chip is forced, and then flashrom reads the flash chip using either the read function for the specified chip, or if there is none, a simple memcpy(). The patch also moves the global variable int force in flashrom.c into main() and passes it as a parameter to layout.c:show_id(), which was the only other function that used the variable. This is needed to avoid confusion with the new parameter int force which is added to flashrom.c:probe_flash() and used to force probe success for the chip named in char *chip_to_probe. Corresponding to flashrom svn r259 and coreboot v2 svn r3367. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Add support for Amic Technology A29040B flash chipPeter Stuge2008-06-111-0/+1
| | | | | | | | | PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4. Corresponding to flashrom svn r257 and coreboot v2 svn r3365. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
* Revert r3357 and fix it as intended to (forgotten header commit instead of typo)Mart Raudsepp2008-05-271-0/+1
| | | | | | | Corresponding to flashrom svn r254 and coreboot v2 svn r3358. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* Add support for Amic A25L40P SPI flashRudolf Marek2008-05-221-0/+1
| | | | | | | Corresponding to flashrom svn r246 and coreboot v2 svn r3345. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Changes to make flashrom compile (and work) on FreeBSDAndriy Gapon2008-05-221-0/+19
| | | | | | | | | | | | This patch addresses different argument order of outX() calls, FreeBSD-specific headers, difference in certain type names and system interface names, and also FreeBSD-specific way of gaining IO port access. Corresponding to flashrom svn r245 and coreboot v2 svn r3344. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support Pm49FL004/2 Block Locking RegistersNikolay Petukhov2008-05-171-4/+4
| | | | | | | | | | | | | | | | | | The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Bari Ari <bari@onelabs.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-14 06:10:17 +0000