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* ft2232_spi: Normalize error paths in ft2232_shutdown()Nico Huber2021-06-251-5/+7
| | | | | | | | | | | | | | We missed to `free(spi_data)` on one path. It also seems odd to leak the return code of a locally used library into our common infrastruc- ture, so normalize all error paths to return 1. Change-Id: I5158d06127a9a8934b083e48b69d29c4d5a11831 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55696 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Revise comments about output pin statesNico Huber2021-06-251-9/+21
| | | | | | | | | | | | | | | | | | | | The meaning of the variables is easy to misunderstand as some states are merely implicit: All output pins that are not set in the `cs_bits` mask will be constantly driven low. This may be sheer coincidence as all programmers that need additional pins driven use active-low signals to enable buffers. While other pins stay low, *all* pins set in the `cs_bits` mask are supposed to be toggled during SPI transactions. Also drop some irritating dead code and try to explain things in a comment. Change-Id: I2b84ede01759c80f69d5ad17e43783d09ecd1107 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55695 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi: Enhance csgpiol parameter for FT2232"Nico Huber2021-06-251-26/+14
| | | | | | | | | | | | | | | | This reverts commit ba6575de82f091b97ea0f2efcf2f79ef3739d64f. Technically, the only thing that is wrong here is the lack of docu- mentation (manpage update). However, as this change was succeeded by a regressing fixup patch, it seems likely that the meaning of the `csgpiol` parameter was just misunderstood and these changes were not what the author intended. Change-Id: I460237b9d275b1cd1d8a069f852d17dea393b14e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi: Fix broken GPIOL cs_bits state (#126)"Nico Huber2021-06-251-1/+1
| | | | | | | | | | | | | | | | | This reverts commit a43e44b6abbe8381be3f3dd20a430973cf8b8ab5. Nothing was broken. So this breaks everything. Well, actually only the `csgpiol` parameter. But that is very obvious. `csgpiol` was added to use a GPIO pin as /CS. But this change impli- citly hardcoded /CS to ADBUS3. Change-Id: I9ecdfe227585dda74658c16c96a57dd42d1d78b4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55693 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Revert "ft2232_spi.c: Generalize GPIOL pin control"Nico Huber2021-06-251-43/+1
| | | | | | | | | | | | | | This reverts commit 3207844ec0b5dc16f9ae9ee45294213dbf6d060b. It used the `cs_bits` variable for its own purpose (not CS) which was only possible because the `cs_bits` semantics were broken earlier. It also lacks an update to the manpage. Change-Id: I4a95317b1cf1fc6df9471d0cfb8a6a8f40964fe3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55692 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi.c: Rename cs_bits to pinlvl"Nico Huber2021-06-251-14/+14
| | | | | | | | | | | | | | | This reverts commit 180079632b15758ca0bbbe5782611bd4573e11d8. The renaming only seemed to match the code because of earlier introduced regressions (see following reverts). For proper support of the `gpiol` feature, we'd likely need both a `cs_bits` and a `pinlvl` variable. Change-Id: Ifa5b2259ccf49ddf729d01176bacd94a95c39925 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55691 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Drop ft2232_spi_send_command()Nico Huber2021-06-251-90/+1
| | | | | | | | | | | Now that ft2232_spi_send_multicommand() is implemented, we don't need the single-command version anymore. Change-Id: I2e7fa1046e260f490b881a33e02ad73d16f0a30c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Don't lower write data chunksizeNico Huber2021-06-251-4/+0
| | | | | | | | | | | | | | | This "chunk size" limits the amount of data that is passed to libusb at once. If we had exceeded the chunk size, libftdi would have split the data into individual, synchronous bulk transfers. But the chunk size was actually chosen to avoid this. So without any known effect, setting the chunk size is useless. Drop it. Change-Id: I779e24dc3f3379a98ddce02c3765062ac3241884 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi.c: Implement spi_send_multicommand()Simon Buhrow2021-06-251-1/+90
| | | | | | | | | | | | | | | | | | Every ftdi_write_data() call is quite time consuming as the ftdi-chips seems to take always 2-3ms to respond. This leads to what the comment already says: Minimize USB transfers by packing as many commands as possible together. So I packed the WREN command together with the following operation which can be program or erase operation. This saves about 1 minute when programming a 128MBit Flash within a virtualized setup. Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Reviewed-on: https://review.coreboot.org/c/flashrom/+/40477 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Move test environment header files into tests directoryAnastasia Klimchuk2021-06-222-0/+0
| | | | | | | | | | | | | | | | | | | | | Both of these headers are only used in test builds, so they should live in tests/ directory. No changes to meson.build and tests/meson.build files are needed because tests/meson.build adds current directory to search for include files. BUG=b:181803212 TEST=ninja test -> all tests pass nm builddir/tests/flashrom_unit_tests.p/.._it85spi.c.o -> has symbols _test_calloc, _test_free, test_inb, test_outb nm builddir/flashrom.p/it85spi.c.o -> has symbols calloc free inb outb Change-Id: Ia42773b98b1eb6c65241aa559c0c8b4926bd0814 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* buspirate: Add psus optionJeremy Kerr2021-06-212-1/+31
| | | | | | | | | | | | This change adds a 'psus=<on|off>' option, to control the external Vcc state of the bus pirate, allowing hardware where the SPI flash chip is powered by the 3V3/5V lines directly. Change-Id: I8a7d4b40c0f7f04f6976f6757f05b61f2c9958f9 Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add support for Macronix MX66L1G45GPatrick Rudolph2021-06-202-0/+50
| | | | | | | | | | Tested on Dediprog SF600: Reading and writing works. Change-Id: I554e828c97d9ec77b08489573a34e176599d2518 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buspirate_spi.c: Drop bp_ prefix for spi data struct membersAnastasia Klimchuk2021-06-201-13/+13
| | | | | | | | | | | | | | | The name of the struct type already contains bp_ prefix, so prefix doesn't need to be repeated in members name. BUG=b:185191942 TEST=builds Change-Id: Ia463e3f58497e4b10be072bdd29244f4868098e7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buspirate_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-06-201-19/+42
| | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: I418bbfff15fb126b042fbc9be09dbf59f4d243b8 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52958 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* buspirate_spi.c: Separate shutdown from failed init cleanupAnastasia Klimchuk2021-06-201-49/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Shutdown function was covering two different jobs here: 1) the actual shutdown which is run at the end of the driver's lifecycle and 2) cleanup in cases when initialisation failed. Now, shutdown is only doing its main job (#1), and the driver itself is doing cleanup when init fails (#2). The good thing is that now resources are released/closed immediately in cases when init fails (vs shutdown function which was run at some point later), and the driver leaves clean space after itself if init fails. And very importantly this unlocks API change which plans to move register_shutdown inside register master API, see https://review.coreboot.org/c/flashrom/+/51761 BUG=b:185191942 TEST=builds Change-Id: I04d57e2552d23a1a4a906c68539f0ccefc13e8a0 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52877 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libflashrom: remove flashrom_system_infoThomas Heijligen2021-06-202-2/+0
| | | | | | | | | | | | void flashrom_system_info(void) has no implementation nor any relation to existing code. Change-Id: Iad805322aeead149a8d51ad8bf0babde2a12f01f Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* libflashrom: remove flashrom_supported_programmersThomas Heijligen2021-06-203-22/+0
| | | | | | | | | | | | | | const char **flashrom_supported_programmers(void) returns an array of strings without returning the array size or making a NULL termination. This can lead to undefined behavior when iterating over the array. Change-Id: I0157926a654e337c14d840dd398e5576471c304f Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55350 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer.h: sort programmer entries alphabeticallyThomas Heijligen2021-06-201-29/+29
| | | | | | | | Change-Id: Ie419eac2719aceb3aea803fac8ce85de294c88e5 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55495 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ich_descriptors: Refactor read_ich_descriptors_from_dump()Nico Huber2021-06-191-17/+17
| | | | | | | | | | | Process the "upper map" early as it doesn't depend on the descriptor generation. This way, we can use it to guess the generation. Change-Id: Ia2786b762ccefdce31b63397119bd89879e887ff Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55646 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ich_descriptors: Drop some unnecessary `else` after `return`Nico Huber2021-06-191-10/+8
| | | | | | | | | Change-Id: Id739bc12832e3b441e8e7e1dcdcc4c05b260d7ad Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55645 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ich_descriptors: Revise descriptor messagesNico Huber2021-06-191-7/+13
| | | | | | | | | | | | | Correct "firmware descriptor" to "flash descriptor". And also move the check for peculiar descriptors and the message into an inline function. Change-Id: I7f15780e03d2fa17ca6d8328275cae5af13ae424 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55644 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* lspcon: restart MPU on programmer shutdownPeter Marheine2021-06-171-6/+9
| | | | | | | | | | | | | | | | Programmer initialization stops the on-chip MPU, and it was never restarted. Leaving it stopped seems to prevent some display detection from working, so implement restarting the MPU on programmer shutdown. BUG=b:190359231 TEST=display hotplug works reliably after device communication Change-Id: I66cd68f8f6905a2bfaf5b085bf08dcb218f42855 Reviewed-on: https://review.coreboot.org/c/flashrom/+/55403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sam McNally <sammc@google.com>
* programmer.h: remove compile guard from programmer driversThomas Heijligen2021-06-111-187/+43
| | | | | | | | | | | | The definition of external structs doesn't have to be guarded. See discussion under review.coreboot.org/52946. Change-Id: I01e6a785269c3e0bd648eeaee217a7a855ab0853 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55387 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* dummyflasher: Re-arrange includesNico Huber2021-06-111-3/+2
| | | | | | | | | | | Gather library includes at the top. Change-Id: Ib20a3245cae3206dca1d8f88f705ac3628473f43 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55359 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* dummyflasher: Replace another case of `sizeof(struct ...)`Nico Huber2021-06-111-1/+1
| | | | | | | | | | | | Using the pointer's type instead ensures that we get the right size even if code changes in the future. Change-Id: If88ba394095f86c598dcc5cf1751e1c23b132d04 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips.c: Mark MT25QL256 as testedSimon Buhrow2021-06-101-1/+1
| | | | | | | | | | As mentioned in mail from Bernd.Stoeferle@elbitsystems-de.com on 22.12.2020. Change-Id: Ie49332333f49a40f7bd8f3b5e42a8e2ad6995618 Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/50720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* nicrealtek.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-06-101-10/+31
| | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the par_master data field for the life-time of the driver. This is one of the steps on the way to move par_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: If0cb0fefb53b2c6bb65a85f4c8dc6f323954dd0c Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* enum programmer: not needed anymore. RemoveThomas Heijligen2021-06-102-128/+0
| | | | | | | | | Change-Id: I53cdb160616911a4beea6b5e8e56d582621818a4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55124 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* CONFIG_DEFAULT_PROGRAMMER_NAME: Use programmer name instead of enumThomas Heijligen2021-06-105-16/+28
| | | | | | | | | | | | | | CONFIG_DEFAULT_PROGRAMER_NAME replaces CONFIG_DEFAULT_PROGRAMMER. It uses the name of the programmer for identification. make CONFIG_DEFAULT_PROGRAMER_NAME=dummy and meson -Ddefault_programmer_name=dummy will extend to CONFIG_DEFAULT_PROGRAMER_NAME=&programmer_dummy in the code. Change-Id: I976447787c6f6bfbdc0145d80d61e1ddcf97ac33 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* cli_classic: replace enum programmer with programmer_entry*Thomas Heijligen2021-06-101-8/+12
| | | | | | | | | Change-Id: I4c45f278addeea0d486a316435e8dc15d93cbd70 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55122 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_init: use struct programmer_entry*Thomas Heijligen2021-06-105-15/+15
| | | | | | | | Change-Id: Iacf0f25abc94a84c5d52c8d69a3e8640817b060a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55121 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c libflashrom.c: replace enum programmer with size_tThomas Heijligen2021-06-102-2/+2
| | | | | | | | | | | Using size_t since programmer_table_size uses ARRAY_SIZE which returns size_t. Change-Id: Id2ad9630fbc41e98d182768b553788e069fa5095 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55120 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c: replace enum programmer with struct programmer_entry*Thomas Heijligen2021-06-101-12/+12
| | | | | | | | Change-Id: I478c56354d5f482010bfe1560489700bc889717a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55119 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* print.c: use static string for internal programmer nameThomas Heijligen2021-06-101-2/+1
| | | | | | | | Change-Id: If2cf95c71425efdd864457e213dd34b929fe8805 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55118 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: replace PROGRAMMER_INVALID with programmer_table_sizeThomas Heijligen2021-06-105-14/+14
| | | | | | | | Change-Id: Icaaeefe001de604df9d7fdd06f05a5ed39fdbd84 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55117 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: move each entry to the associated programmer sourceThomas Heijligen2021-06-1041-617/+506
| | | | | | | | | Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: change chip name from 'W25Q64JW' to 'W25Q64JW...M'Nikolai Artemiev2021-06-102-3/+3
| | | | | | | | | | | | | | | | | | | | According to the W25Q64JW datasheet rev. E, only devices ending with the letter 'M' have a device ID of 8017h. There are other variants with different device IDs. This patch makes the 'W25Q64JW...M' definition consistent with the 'W25Q32JW...M' definition. The device ID macro defined in flashchips.h has also been renamed from WINBOND_NEX_W25Q64JW to WINBOND_NEX_W25Q64JW_M. BUG=b:166294558 BRANCH=none TEST=builds Change-Id: Ib0dc914da286a191d22e666332b1063b88db4251 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashchips.c: add support for W25Q32JW...MNikolai Artemiev2021-06-102-0/+39
| | | | | | | | | | | | | | | | | | | | | The chip was added to cros flashrom in `commit 1fc77dd1ee27a5d6e58a82c6ed6ed390a15372d7`. Quoting from the commit message: > We have varied the correct chip name is reported as well as > write and read 16MBytes of random data and verified the checksum's match. > Further, --wp-list appears to report the correct ranges. > > BUG=b:130199963 > BRANCH=none > TEST=Ran flashrom with a Dediprog SF100, RW random data and checksum matched. Change-Id: I7425e12658dd69c4ec8d3309dd591d09a935bb4d Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/53946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* treewide: Drop unnecessary uses of memset/memcpyAngel Pons2021-06-098-49/+21
| | | | | | | | | | Simply provide an initialiser or use a direct assignment instead. Change-Id: I07385375cd8eec8a95874001b402b2c17ec09e09 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* treewide: Drop most cases of `sizeof(struct ...)`Angel Pons2021-06-0918-21/+21
| | | | | | | | | | | | | | | | Spelling out the struct type name hurts readability and introduces opportunities for bugs to happen when the pointer variable type is changed but the corresponding sizeof is (are) not. TEST=`make CONFIG_EVERYTHING=yes CONFIG_JLINK_SPI=no VERSION=none -j` with and without this patch; the flashrom executable does not change. Change-Id: Icc0b60ca6ef9f5ece6ed2a0e03600bb6ccd7dcc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* dummyflasher.c: Drop useless macrosAngel Pons2021-06-091-37/+1
| | | | | | | | | | | | | | | | | | The `EMULATE_CHIP` and `EMULATE_SPI_CHIP` macros are unconditionally defined as `1`, with no way to change their values. Since this means that the code never gets build-tested using other values, drop these noisy macros. TEST=Build with `make distclean && make VERSION=none -j` with and without this patch, the flashrom executable does not change. Change-Id: If46e1c37c3b04b28b4ba1f82c9b3def1e549368f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55265 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Namyoon Woo <namyoon@google.com>
* nic3com.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-06-091-13/+47
| | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the par_master data field for the life-time of the driver. This is one of the steps on the way to move par_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: I9834b82650cd070556cf82207796bc6bd6b31b28 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: convert entries to pointersThomas Heijligen2021-06-097-410/+572
| | | | | | | | | | Allows us to move the individual entries into their respective driver files. Change-Id: Ifbb0ee4db5a85b1cd2afeafe4dca838579f79878 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52945 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: move array content to an own fileThomas Heijligen2021-06-094-479/+495
| | | | | | | | Change-Id: I8e6d704e845ee4152c8676dd19dff0934fff007b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52944 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_table: add table size constantThomas Heijligen2021-06-092-1/+4
| | | | | | | | | | | | Makes the array size known to other compilation units. Change-Id: Idacb4b7b0dd98af8bc7cbecf567d33daafb4b24d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55116 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_table: remove null terminationThomas Heijligen2021-06-091-3/+1
| | | | | | | | | | | The {0} object at the end of programmer_table which corresponds to PROGRAMMER_INVALID has no use in current code. Change-Id: Ib63c2d2941f23a0788e26e5a5feb25d8669acb42 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* dummyflasher.c: Fix data leak in params processing error pathsAnastasia Klimchuk2021-06-081-27/+51
| | | | | | | | | | | | | | | | | | | | | | | | This patch extracts params processing into a separate function. Now all error paths of params processing return 1 back to init function which frees data. And there was just one more error path in init function where free(data) needed to be added. This is a follow up on commit 3b8fe0f8e907c0ba9f7c7935e950f3e1538d427f which moves global state into spi_master data. A good side-effect of the change is: init function becomes easier to read. BUG=b:185191942 TEST=ninja test Change-Id: I04f55f77bb4703f1d88b2191c45a22be3c97bf87 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54748 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* platform: Fix endianness detection for Apple Silicon MacsIvan V2021-06-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Building flashrom on Apple Silicon Macs fails with "Unable to determine endianness" error. It seems that current endianness detection fails on macOS due to a combination of three issues: 1. On macOS, neither GCC nor Clang have __ARMEL__ macros used by architecture-specific detection; 2. Generic detection fails because Apple uses LITTLE_ENDIAN, BIG_ENDIAN and BYTE_ORDER macros instead of __BYTE_ORDER and __LITTLE_ENDIAN; 3. In platform.h, __LITTLE_ENDIAN__ and __BIG_ENDIAN__ macros are checked only for PowerPC architecture. This error can be fixed by appending __LITTLE_ENDIAN__ and __BIG_ENDIAN__ to conditions in IS_ARM branch. I've considered multiple approaches, but this one seems the cleanest to me. Signed-off-by: Ivan V <root@pcm720.me> Change-Id: Ifdb1523ee2c7023e657cfd7b823b091d5deef513 Reviewed-on: https://review.coreboot.org/c/flashrom/+/54964 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Add unit test to run init/shutdown for mec1308.c, ene_lpc.cAnastasia Klimchuk2021-06-057-7/+224
| | | | | | | | | | | | | | | | This patch includes mocks for io operations in hwaccess_x86_io.h because those are needed to test lifecycle of mec1308.c and ene_lpc.c BUG=b:181803212 TEST=builds and ninja test Change-Id: I3af612defe1af3850dfc1626a208d873e3a3eddc Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51487 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* rayer_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-06-031-38/+91
| | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the bitbang_spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: Idde4557d89f80fe5d5884ce6c8cdf538ad2e5d68 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54998 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-07 20:53:13 +0000