aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Only check for requested features in the MakefileCarl-Daniel Hailfinger2009-12-241-5/+14
| | | | | | | | | | | | | | | | Libpci is no longer required to build flashrom and will not be checked for if no PCI code is needed for the selected programmers. libftdi is no longer checked for if FT2232 support is not selected. With this patch, it is possible to build on pretty much every OS out there (including Windows) without altering the Makefile. Some gcc versions may need a CFLAGS override for a warning in dummyflasher.c, though. Corresponding to flashrom svn r823. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Internal.c was always compiled in because it hosted the function ↵Carl-Daniel Hailfinger2009-12-244-15/+16
| | | | | | | | | | | | | internal_delay() Move that function to udelay.c and compile internal.c only if really needed. physmap.c is only needed if the programmer is internal or a PCI card. Make its compilation conditional. Corresponding to flashrom svn r822. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Factor out CLI code by moving generic stuff out of main()Carl-Daniel Hailfinger2009-12-242-60/+99
| | | | | | | | | | | | | Add a generic programmer list output function to be used by alternative frontends. The interface between main() and doit is a hack and should get a clean design, but for now it serves the purpose of shortening main() by 120 lines. The rest of main() needs to be refactored a bit more before moving main() away. Corresponding to flashrom svn r821. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Add VIA VT8233A identification, mark as testedRaúl Soriano2009-12-231-0/+1
| | | | | | | Corresponding to flashrom svn r820. Signed-off-by: Raúl Soriano <GatoLoko@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Convert the following chips to use struct eraseblockSean Nelson2009-12-235-19/+246
| | | | | | | | | | | | | | | | | | | | | | | AMIC_A29002B AMIC_A29002T EN_29F002B EN_29F002T MBM29F004BC MBM29F004TC MBM29F400BC MBM29F400TC MX_25L3205 MX_25L6405 MX_29F002B MX_29F002T Add block erasers for m29f400bt and mx29f002. Change programmer delays from 2 seconds to 10us in mx29f002 and am29f040b. Corresponding to flashrom svn r819. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add blockwise erase to all supported chips of the SST25 familyCarl-Daniel Hailfinger2009-12-231-19/+127
| | | | | | | | | | SST25VF040.REMS, SST25VF040B, SST25VF040B.REMS, SST25VF080B, SST25VF016B, SST25VF032B Corresponding to flashrom svn r818. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Convert the following chips to use struct eraseblockSean Nelson2009-12-231-27/+365
| | | | | | | | | | | | | | | AT25DF021, AT25DF041A, AT25DF081, AT25DF161, AT25DF321, AT25DF321A, AT25DF641, AT25F512B, AT25FS010, AT25FS040, AT26DF041, AT26DF081A, AT26DF161, AT26DF161A, AT26F004, AT29C512, AT29C010A, AT29C020, AT29C040A, AT49BV512, AT49F002(N), AT49F002(N)T A possible future patch would to add spi_block_erase_d7 to spi.c as an alternate to spi_block_erase_20. Only some SPI chips support d7. Corresponding to flashrom svn r817. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board: Add MSI K8N Neo4-FLuc Verhaegen2009-12-231-0/+9
| | | | | | | Corresponding to flashrom svn r816. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Fraser Hanson <fraser.hanson@gmail.com>
* Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enableLuc Verhaegen2009-12-233-152/+62
| | | | | | | | | | | | | | | | | | | | | | | Only done for VT8237R (possibly needed for VT8237 too), VT8235 does not need this (even if the original bios does so: Asus A7V8X-MX SE, MSI KT4V were verified). This then opens a floodgate of cleanups in the board enables. * EPIA SP board enable vanishes, taking EPIA CN match with it. * Asus A7V8X-MX/Tyan S2498 board enable then equals w836xx_memw_enable_2e * AOpen vKM400Am-S board enable then equals it8705_rom_write_enable * Epia M board enable becomes via_vt823x_gpio15_raise * Epia N board enable becomes via_vt823x_gpio9_raise * Asus M2V-MX board enable becomes via_vt823x_gpio5_raise * vt823x_gpio_set becomes via_vt823x_gpio_set, and now detects ISA bridge itself, in concordance with intel ich and nvidia mcp gpio. Corresponding to flashrom svn r815. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a few FIXME comments to the generic SPI codeCarl-Daniel Hailfinger2009-12-221-0/+2
| | | | | | | Corresponding to flashrom svn r814. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* SuperI/O detection now happens unconditionally and before the chipset enableCarl-Daniel Hailfinger2009-12-224-11/+106
| | | | | | | | | | | | | | | | | We could run it after chipset enable, but it definitely has to happen before board enable because the board enable usually accesses the SuperI/O. With this patch, it is possible to add a struct superio to the board enable table for more accurate matching in case subsystem IDs are ambiguous. This patch focuses on the generic infrastructure aspect and on support for IT8712F/IT8716F. Thanks go to Adrian Glaubitz and Ward Vandewege for testing. Corresponding to flashrom svn r813. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
* Convert the following chips to use struct eraseblockSean Nelson2009-12-224-33/+187
| | | | | | | | | | | | | | | | | | | | | | Am29F010A/B Am29F002(N)BB Am29F002(N)BT Am29F016D Am29F040B Am29F080B Am29LV040B Am29LV081B A29040B Pm29F002T Pm29F002B Change function signature of Am29 erase functions and JEDEC chip erase to be usable with block_erasers. Corresponding to flashrom svn r812. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Clarify comment about how to enter chip erase functions in struct block_eraserCarl-Daniel Hailfinger2009-12-221-2/+2
| | | | | | | | | Reported by Sean Nelson. Corresponding to flashrom svn r811. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Boards: Fix several issues with nvidia_mcp_gpio_setLuc Verhaegen2009-12-221-3/+13
| | | | | | | | | | | | - CK804, MCP04, MCP2 use the isa bridges.. - Newer nvidia mcp's do use the smbus controllers (Found by Michael Karcher). - gpio line check breaks EPoX EP-8RDA3+, and should be wider. Corresponding to flashrom svn r810. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Chipset: Add support for Intel Poulsbo chipsetAdam Jurkowski2009-12-211-0/+22
| | | | | | | Corresponding to flashrom svn r809. Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl> Acked-by: Luc Verhaegen <libv@skynet.be>
* Boards: Add ECS K7S6ALuc Verhaegen2009-12-181-1/+4
| | | | | | | | | | The nulled second set of subsystem ids is correct, and this seems to be a unique match. Corresponding to flashrom svn r808. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: spirals <spirals@eircom.net>
* jedec: warn if toggle bit is stuck for too long and allow for delays between ↵Carl-Daniel Hailfinger2009-12-171-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | tries If the JEDEC Toggle Bit algorithm needs more than 2^20 loops, it is a good sign we should have used delays between toggle bit reads. Tell the user about this. 2^20 loops need roughly a second depending on flash bus speed. One reason for excessive loops can be a slow operation like erase. The Winbond W39V040C requires a 50 ms delay between toggle bit reads during erase according to the datasheet. Turns out a 2 ms delay is sufficient. Use a safety factor of 4 and default all erase operations to 8 ms delay between toggle reads. This is short enough not to have a substantial negative impact on erase times, and should improve reliability. This patch addresses the excessive toggle behaviour (observed on some non-Winbond chips) and the toggle delay requirement (Winbond W39V040C). Corresponding to flashrom svn r807. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Javier Ortega Conde (aka Malkavian) <malkavian666@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use the maximum decode size infrastructureCarl-Daniel Hailfinger2009-12-172-33/+110
| | | | | | | | | | | | | | | | | | - Detect max FWH size for Intel 631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10. - Move IDSEL override before decode size checking for the chipsets listed above or flashrom will complain based on old values. - Adjust supported flash buses for the chipsets listed above (none of them supports LPC or Parallel). - Detect max parallel size for AMD/National Semiconductor CS5530. - Adjust supported flash buses for CS5530/CS5530A. - Set board-specific max decode size for Elitegroup K7VTA3. - Set board-specific max decode size for Shuttle AK38N. Corresponding to flashrom svn r806. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Skip all delays in probe_jedec() if probe_delay is 0Sean Nelson2009-12-171-6/+12
| | | | | | | | | | | Probe_jedec() checks the delay value and issues programmer_delay based on the value except for delays between single chip_writeb. If a chip has zero probe_delay, delays between chip_writeb should be skipped as well. Corresponding to flashrom svn r805. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove nonexisting functions from chipdrivers.hCarl-Daniel Hailfinger2009-12-171-4/+0
| | | | | | | Corresponding to flashrom svn r804. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Boards: Formalize intel piix4 gpo settingLuc Verhaegen2009-12-141-19/+77
| | | | | | | | | | | | | | | | | | The function intel_piix4_gpo_set includes proper gpo pin checking, and gpo pin enables when necessary. This is a leftover from soyo SY-6BA+III code that turned out to be unnecessary, but still used for the epox ep-bx3 board enable which it cleans up and clarifies. Difference to old code: * typical bios delay io port 0xEB now never gets touched. * pci config byte 0xB0 was not altered before. Corresponding to flashrom svn r803. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Use pci_fill_info() so device_class is validJonathan A. Kollasch2009-12-141-1/+3
| | | | | | | | | This is needed on NetBSD and probably other non-Linux platforms. Corresponding to flashrom svn r802. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Mark ASRock M3A790GXH/128M as supported, no board enable neededZachary O Dillard2009-12-142-0/+2
| | | | | | | Corresponding to flashrom svn r801. Signed-off-by: Zachary O Dillard <teathief@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix eraseblock walking and add a few more checks to make sure such bugs get ↵Carl-Daniel Hailfinger2009-12-141-2/+25
| | | | | | | | | | | | caught in the future I found this bug during a code review. A consistency check for eraseblock definitions has been merged as well. Corresponding to flashrom svn r800. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Split hardware access, OS abstraction and chip drivers out of flash.hCarl-Daniel Hailfinger2009-12-143-216/+278
| | | | | | | | | | | | | | | | This patch is only the first step, but it hopefully will make working with the code and especially porting to new platforms easier. Subsequent patches should move #includes for the newly created files hwaccess.h and chipdrivers.h from flash.h to the files which need them. Programmers should live in a separate header file as well. Tested-by: Idwer Vollering <vidwer@gmail.com> Corresponding to flashrom svn r799. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Don't print out supported PCI devices header if all following lines are ↵Adam Jurkowski2009-12-141-0/+2
| | | | | | | | | excluded from build Corresponding to flashrom svn r798. Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Internal (onboard) programming was the only feature which could not be disabledCarl-Daniel Hailfinger2009-12-139-50/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make various pieces of code conditional on support for internal programming. Code shared between PCI device programmers and onboard programming is now conditional as well. It is now possible to build only with dummy support: make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no This allows building for a specific use case only, and it also facilitates porting to a new architecture because it is possible to focus on highlevel code only. Note: Either internal or dummy programmer needs to be compiled in due to the current behaviour of always picking a default programmer if -p is not specified. Picking an arbitrary external programmer as default wouldn't make sense. Build and runtime tested in all 1024 possible build combinations. The only failures are by design as mentioned above. Corresponding to flashrom svn r797. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Boards: Tighten up ID match listLuc Verhaegen2009-12-091-28/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tighten up board id match table in preparation of upcoming matching changes. Some boards are deliberately broken so that we will receive reports or can remove support later (for instance, for agami aruma, which, probably is no longer available in the wild). * Acorp 6A815EPD: make autodetectable. * Agami Aruma: remove bogus subsystem ids. Due to lacking secondary main id, this match will break soon. * GIGABYTE GA-2761GXDK: Add secondary main id. Subsystem ids are not possible as they are all copies of the main ids. Will still require -m. * GIGABYTE GA-M57SLI-S4: add full set of subsystem ids. Will keep match name for coreboot name matching. * GIGABYTE GA-M61P-S3: Add secondary main id. Remove name match. Probably has good subsystem ids, but no info was found. So deliberately broken match. * GIGABYTE GA-MA790FX-DQ6: pointless name match. * IBM x3455: add full ids, remove name match. * Kontron 986LCD-M: remove full id match as it is bogus. Kontron is an embedded vendor and does not bother with subsystem ids, so make this board name match only. * MSI MS-6590 (KT4 Ultra): remove name match. * MSI MS-7135 (K8N Neo3): add full id set, keep name match for coreboot. * VIA EPIA-N/NL: remove name match. * VIA PC3500G: remove name match. Corresponding to flashrom svn r796. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Boards: Add Asus M2V-MXDavid Bartley2009-12-091-6/+31
| | | | | | | | | Expands via vt823x gpio support to also accept gpio5. Corresponding to flashrom svn r795. Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca> Acked-by: Luc Verhaegen <libv@skynet.be>
* Chipset: remove sis630 chipset enable for sis540Luc Verhaegen2009-12-092-51/+19
| | | | | | | | | | | | | SiS630 chipset enable is equal to sis540 plus superio "poking". Superio poking equals IT8705F flash write enable, which is currently dealt with on a board by board basis in board_enable.c. Not all 630 and newer based boards come with it8705/sis950 superios. Corresponding to flashrom svn r794. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI)Maciej Pijanka2009-12-081-0/+2
| | | | | | | Corresponding to flashrom svn r793. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Boards: Add general nVidia MCP gpio routineLuc Verhaegen2009-12-031-49/+38
| | | | | | | | | | Turns out that the AMD 8111 datasheet describes this bit of the MCP perfectly. Corresponding to flashrom svn r792. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Mark the following boards as OK (no board-enable needed)Idwer Vollering2009-12-012-0/+7
| | | | | | | | | | | | | | | | - AsRock K8S8X (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-November/000937.html - ASUS K8V-X SE (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-November/000965.html - DFI Blood-Iron P35 T2RL (reported by Erno Vaurio <ernovaur@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-November/001059.html Corresponding to flashrom svn r791. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for Shuttle AK31Luc Verhaegen2009-11-291-12/+8
| | | | | | | | | | | | | | All AK31 versions, 1.x, 2.x and 3.x are supported by this board enable. Sadly this board can not be autodetected. Re-uses the epox ep 8k5a2 board enable, which now lost its check for the VT8235 ISA bridge and got renamed to w836xx_memw_enable_2e. Corresponding to flashrom svn r790. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mateusz Murawski <matowy@tlen.pl>
* Boards: Fix up MSI KT4V board enableLuc Verhaegen2009-11-281-6/+2
| | | | | | | | | | * Add autodetection and remove match strings. * Make use of vt823x_set_all_writes_to_lpc. Corresponding to flashrom svn r789. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Boards: Add Asus P4B266LM (Sony Vaio PCV-RX650)Luc Verhaegen2009-11-281-1/+4
| | | | | | | Corresponding to flashrom svn r788. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Allan Bjorklund <abjork@speakeasy.net>
* Boards: Add board match for Asrock P4i65GVLuc Verhaegen2009-11-281-1/+4
| | | | | | | Corresponding to flashrom svn r787. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Boards: provide enormous intel_ich_gpio_set functionLuc Verhaegen2009-11-281-146/+225
| | | | | | | | | | This code sets gpio lines on random intel ichs. Detects all currently known intel ICHs, checks gpio lines, and then sets them accordingly. Corresponding to flashrom svn r786. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Use common jedec functionality where appropriateMichael Karcher2009-11-279-89/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | The deleted function in en29f002a.c is reintroduced as write_by_byte_jedec in jedec.c as it contains no chip-specific instructions. It is not yet used in other chip drivers, as key addresses (0x2AAA/0x5555) are often specified with less bits. After crosschecking datasheets, most of the fixmes can probably be resolved as indicated in them, causing significant code reduction. The common JEDEC code for bytewise programming does not program 0xFF at all. The chips that had a dedicated bytewise flash function which has been changed to write_jedec_1 thus changed flashing behaviour and the "write" test flag has been removed. This applies to: AMD Am29F002BB/Am29F002NBB AMD Am29F002BT/Am29F002NBT (TEST_OK_PREW before) AMIC A29002B AMIC A29002T (TEST_OK_PREW before) EON EN29F002(A)(N)B EON EN29F002(A)(N)T (TEST_OK_PREW before) Macronix MX29F001B (TEST_OK_PREW before) Macronix MX29F001T (TEST_OK_PREW before) Macronix MX29F002B Macronix MX29F002T (TEST_OK_PREW before) Macronix MX29LV040 Similar analysis should be performed for the read id stuff. Corresponding to flashrom svn r785. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Intel 3400 series / 5 series chipsetCarl-Daniel Hailfinger2009-11-261-0/+3
| | | | | | | | | | | | | | | Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400 Series Chipset Specification Update). According to http://pciids.sourceforge.net/ we probably should match all IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the same. If anybody has contacts at Intel and can check, I'd be happy to add the rest of the IDs. Corresponding to flashrom svn r784. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Refine support for the JEDEC Software Data ProtectionMichael Karcher2009-11-266-50/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the extremely dangerous unprotect_jedec function which is not used at all within flashrom code, and renames the misleadingly named protect_jedec function to start_program_jedec. Calls to protect_jedec after flashing are removed, because a) on LPC chips, the command sent by protoct_jedec is not even in the datasheet and b) on parallel chips, the block write command issued before already contained the software protection sequence, so software protection is definitely enabled. This patch also removes two clones of protect_jedec Background: JEDEC Software Data Protection started as an optional feature, which was disabled on the first single-voltage-flash chips. The software data protection is the need to prefix a write with a magic "write enable" command, while without write protection every write access into the chip's address space modifies flash content. This magic write enable command also tells the flash chip that the programmer obviously support sending write-enable commands and turns off the "any write modifies flash content" mode. There also exist a two-command (6 writes) sequence that disables Software Data Protection completey, which should only ever be used to prepare updating with a device that can't handle software data protection. Corresponding to flashrom svn r783. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add entries of W25x32 and W25x64Zheng Bao2009-11-261-0/+32
| | | | | | | | | | | | The model_ids are already in the header. W25x32 has been successfully probed. W25x64 is not available, the entry is based on the datasheet. Corresponding to flashrom svn r782. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Clarify a comment about verification routine usageCarl-Daniel Hailfinger2009-11-251-1/+2
| | | | | | | Corresponding to flashrom svn r781. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Reduce realloc syscall overhead for FT2232 and bitbangCarl-Daniel Hailfinger2009-11-252-6/+17
| | | | | | | | | | | | FT2232 ran realloc() for every executed command. Start with a big enough buffer and don't touch buffer size unless it needs to grow. Bitbang was slightly better: It only ran realloc() if buffer size changed. Still, the solution above improves performance and reliability. Corresponding to flashrom svn r780. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Jedec.c was missing error handling in a few casesCarl-Daniel Hailfinger2009-11-251-17/+23
| | | | | | | | | | Fix. jedec.c error handling used double negation in too many places for no good reason. Clean up. Corresponding to flashrom svn r779. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Optimized write_sst_fwhub for safety and speedAdam Jurkowski2009-11-251-15/+23
| | | | | | | | | | Now uses block erase instead of chip erase. Also introduced auto skip feature. Corresponding to flashrom svn r778. Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Kill hardcoded block erase on ICH SPICarl-Daniel Hailfinger2009-11-251-11/+7
| | | | | | | | | | | | The existing code does not work for all SPI chips, and it just was a band-aid to cope with locked down chipsets back in a time when there was no eraseblock infrastructure. Basically, this unbreaks a few SPI chips on ICH. Corresponding to flashrom svn r777. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
* Add the ability to set Bus Pirate SPI speed via the command lineCarl-Daniel Hailfinger2009-11-245-20/+108
| | | | | | | | | | | | | | | | | | | | | | | Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. Tested-by: Sean Nelson <audiohacked@gmail.com> Corresponding to flashrom svn r776. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Add Sanyo LF25FW203A supportSean Nelson2009-11-241-0/+16
| | | | | | | | | This chip is sometimes labeled as 25FW203T. Corresponding to flashrom svn r775. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add Generic SPI RDID detection for Sanyo chipsSean Nelson2009-11-242-0/+24
| | | | | | | Corresponding to flashrom svn r774. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 14:10:01 +0000