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* Check for a working C compilerCarl-Daniel Hailfinger2009-06-161-2/+11
| | | | | | | Corresponding to flashrom svn r597. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Joseph Smith <joe@settoplinux.org>
* Support reads of arbitrary rangeCarl-Daniel Hailfinger2009-06-167-35/+48
| | | | | | | | | | | | That means you can tell flashrom to read exactly bytes 12345-56789 (start 12345, length 44445) and it will not fetch a single byte more. Uwe tested this on one LPC, one SPI, and one parallel flash board. Corresponding to flashrom svn r596. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom only checks for very few chips if the erase workedCarl-Daniel Hailfinger2009-06-1522-113/+345
| | | | | | | | | | | | | | | | | | | And even when it checks if the erase worked, the result of that check is often ignored. Convert all erase functions and actually check return codes almost everywhere. Check inside all erase_* routines if erase worked, not outside. erase_sector_jedec and erase_block_jedec have changed prototypes to enable erase checking. Uwe successfully tested LPC on an CK804 box and SPI on some SB600 box. Corresponding to flashrom svn r595. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split flashchips.h from flash.hCarl-Daniel Hailfinger2009-06-156-366/+397
| | | | | | | | | | | | | | Flash.h not only contains function prototypes and general settings, it also has a huge chunk of chip and vendor IDs in the middle. Split them out into a separate flashchips.h and adjust #include wherever needed. Corresponding to flashrom svn r594. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix typo in MakefileUwe Hermann2009-06-151-1/+1
| | | | | | | | | | | | This strangely breaks with gmake on FreeBSD, but seems to work with make on Linux. Thanks Idwer Vollering <vidwer@gmail.com> for noticing and testing. Corresponding to flashrom svn r593. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add or refine support for a number of EON flash chipsCarl-Daniel Hailfinger2009-06-152-19/+105
| | | | | | | | | | | | | Fix the vendor ID of EN25B05, EN25B10, EN25B20, EN25B40, EN25B80, EN25B16, EN25B32, EN25B64 EN25F40, EN25F80, EN25F16. Add support for EN25P05, EN25P10, EN25P20, EN25P40, EN25P80, EN25P16, EN25P32, EN25P64 EN25D16 EN25F05, EN25F10, EN25F20, EN25F32 Corresponding to flashrom svn r592. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* The VIA VX800 chipset works with the VT8237S code after adding an entry for ↵Arjan Koers2009-06-151-0/+1
| | | | | | | | | | the VX800 PCI ID Corresponding to flashrom svn r591. Signed-off-by: Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com> Acked-by: Bari Ari <bari@onelabs.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the PMC Pm29F002T/B chipsUwe Hermann2009-06-144-1/+91
| | | | | | | | | | I sucessfully tested all operations on a Pm29F002T chip. The Pm29F002B is untested but I assume it should also work. Corresponding to flashrom svn r590. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Every SPI host controller implemented its own way to read flash chipsCarl-Daniel Hailfinger2009-06-137-63/+42
| | | | | | | | | | | | | | | | | | | | | | This was partly due to a design problem in the abstraction layer. There should be exactly two different functions for reading SPI chips: - memory mapped reads - SPI command reads. Each of them should be contained in a separate function, optionally taking parameters where needed. This patch solves the problems mentioned above, shortens the code and makes the code logic a lot more obvious. Since open-coding the min() function leads to errors, include it in this patch as well. Corresponding to flashrom svn r589. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Add bus type and timing info for some flash chipsMateusz Murawski2009-06-121-18/+18
| | | | | | | Corresponding to flashrom svn r588. Signed-off-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* This patch introduces two new targets which are designed to make the life of ↵Carl-Daniel Hailfinger2009-06-122-3/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | packagers easier In particular, it should no longer be necessary to patch the makefile for hassle-free compilation. The targets are: make export make tarball Both preserve svn revisions and the exported tree does not depend on subversion in any way or shape. Documentation for this feature has been added to README. We need this for five reasons: 1. Packagers currently have to patch flashrom source to compile it on systems without subversion. We should make it easier for them. 2. Snapshot tarballs currently have a .svn 1.5 directory included but this will cause errors for users with older svn 1.4. Not requiring subversion for snapshot compilation is best. 3. Since packagers seldom the svn revision in their fixup patches, some packages out there have incorrect or no revision, only major version numbers. 4. Releasing a new version of flashrom needs too many changes to the makefile which have to be reverted instantly after the release. That is unnecessary churn. 5. Making a release is easy with the change. Update the major version, then run "make tarball". Corresponding to flashrom svn r587. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add missing GPL headers to two filesUwe Hermann2009-06-122-3/+37
| | | | | | | | | | Please complain in case there are errors here, but I'm pretty sure the headers are correct. Corresponding to flashrom svn r586. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom does not honor argument ordering for operationsCarl-Daniel Hailfinger2009-06-122-4/+27
| | | | | | | | | | | | | | Not only does this violate the principle of least surprise, it also caused one bug where -Ewv was specified and the flash ended up being empty. Support only one operation at a time. As a side benefit, this allows us to clean up main() quite a bit. Corresponding to flashrom svn r585. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add #defines for some flash chipsMateusz Murawski2009-06-122-34/+43
| | | | | | | | | Add timing info to some flash chips. Corresponding to flashrom svn r584. Signed-off-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add spi_nbyte_program as generic function to the SPI layerPaul Fox2009-06-122-0/+22
| | | | | | | Corresponding to flashrom svn r583. Signed-off-by: Paul Fox <pgf@laptop.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Tell the user about the beginning and end of the write operationPaul Fox2009-06-121-0/+2
| | | | | | | Corresponding to flashrom svn r582. Signed-off-by: Paul Fox <pgf@laptop.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add board enable for Albatron PM266A boardsLuc Verhaegen2009-06-091-1/+2
| | | | | | | | | | | | | | | There are multiple albatron pm266a boards which all share the same bios image. This means that both the board enable and the subsystem ids are exactly the same. The board enable is the same as the epox EP-8K5A2, namely only raising memw on the superio. Corresponding to flashrom svn r581. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Mateusz Murawski <matowy@tlen.pl>
* Add all Eon EN25* SPI chipsCarl-Daniel Hailfinger2009-06-052-0/+180
| | | | | | | | | | | | Some IDs were already in flash.h. EN25B05 EN25B10 EN25B20 EN25B40 EN25B80 EN25B16 EN25B32 EN25B64 EN25F40 EN25F80 EN25F16 EN25P* are supported as well, but they seem to be identical to EN25B. Corresponding to flashrom svn r580. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Sometimes we want to read/write more than 4 bytes of chip content at onceCarl-Daniel Hailfinger2009-06-057-22/+100
| | | | | | | | | | | | | | | | | | | | Add chip_{read,write}n to the external flasher infrastructure which read/write n bytes at once. Fix a few places where the code used memcpy/memcmp although that is strictly impossible with external flashers. Place a FIXME in the layout.c code because usage is not totally clear and needs to be fixed to support external flashers. As a nice side benefit, we get a noticeable speedup for builtin flash reading which is now a memcpy() of the full flash area instead of a series of single-byte reads. Corresponding to flashrom svn r579. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add programmer-specific delay functionsCarl-Daniel Hailfinger2009-06-0521-103/+129
| | | | | | | | | | | Add external programmer delay functions so external programmers can handle the delay on their own if needed. Corresponding to flashrom svn r578. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Urja Rannikko <urjaman@gmail.com>
* Fix a bug in dummyflasher.c special case where no type parameter is givenCarl-Daniel Hailfinger2009-06-051-1/+1
| | | | | | | Corresponding to flashrom svn r577. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add probe timings forgotten in r569Carl-Daniel Hailfinger2009-06-051-1/+78
| | | | | | | Corresponding to flashrom svn r576. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
* Refine write_lockbits_49lfxxxc() to use struct flashchipCarl-Daniel Hailfinger2009-06-051-26/+26
| | | | | | | Corresponding to flashrom svn r575. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Specify the exact bus type for a number of flash chipsUrja Rannikko2009-06-051-15/+15
| | | | | | | | | | | | Exact bustypes for Atmel AT29C010A, AT29C020, AT29C040A, AT49BV512, AT49F002, AMIC A29040B, A49LF040A, EMST F49B002UA, EON EN29F002, Intel 28F001BX-B, 28F001BX-T, Winbond W29C020C and W29C040P. Checked from datasheets. A49LF040A is LPC, others parallel. Corresponding to flashrom svn r574. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Enable debug output of protection register access on SST49LF* chipsUwe Hermann2009-06-051-9/+17
| | | | | | | Corresponding to flashrom svn r573. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com>
* Let's actually sort the board lists alphabetically, and not just pretend we doUwe Hermann2009-06-041-13/+13
| | | | | | | Corresponding to flashrom svn r572. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark the ASUS A7N8X-E Deluxe as workingUwe Hermann2009-06-042-0/+2
| | | | | | | | | | | I finally found the machine (doesn't belong to me) where I originally tested this board as non-working and I can confirm that all operations work fine now (since the nForce2 patch in r548). Corresponding to flashrom svn r571. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Use macros for inb and outb which were forgotten in r568Idwer Vollering2009-06-031-2/+2
| | | | | | | | | This makes FreeBSD happy. Corresponding to flashrom svn r570. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add probe_timing information (int uS value)Maciej Pijanka2009-06-033-4/+130
| | | | | | | | | | This eliminates the conflicting delay requirements for old and new chips with the same probing sequence. Corresponding to flashrom svn r569. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable: Gigabyte GA K8N SLILuc Verhaegen2009-06-031-1/+26
| | | | | | | | | | | Raises bits 0 and 2 on offset 0xE1 in the system control area of the nvidia ck804 lpc. Corresponding to flashrom svn r568. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Alexander Gordeev <lasaine@lvk.cs.msu.su>
* Mark 3COM "3C905B: Cyclone 10/100/BNC" as fully testedUwe Hermann2009-06-025-11/+11
| | | | | | | | | Also do some random cleanups while I'm at it. Corresponding to flashrom svn r567. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the 10b7:9058 3COM NIC (3C905B: Cyclone 10/100/BNC)Maciej Pijanka2009-06-023-2/+20
| | | | | | | | | | | Also, add Atmel AT29C512 support. Both are tested on hardware by Maciej Pijanka. Corresponding to flashrom svn r566. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add two more boards supported by flashromUwe Hermann2009-06-021-0/+2
| | | | | | | | | | | - ASUS A8N-SLI (reported by Ryan McLean <pvtryan100@googlemail.com>) - MSI/Medion MS-7255 (P4M890M) (reported by Jörg Schirottke <master@kanotix.com>) Corresponding to flashrom svn r565. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Unify AMD manufacture_id and model_idMateusz Murawski2009-06-022-4/+6
| | | | | | | Corresponding to flashrom svn r564. Signed-off-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
* Use read_flash() when flash chip probe is forcedStephan Guilloux2009-06-011-29/+6
| | | | | | | Corresponding to flashrom svn r563. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a missing free() in read_flash()Stephan Guilloux2009-06-011-0/+1
| | | | | | | Corresponding to flashrom svn r562. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refactor HT-1000 GPIO setting to use sio_maskCarl-Daniel Hailfinger2009-06-011-10/+5
| | | | | | | | | | Although the HT-1000 GPIOs are not SuperIO related, the share the same index/data register access method. Corresponding to flashrom svn r561. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Only probe for chips with compatible bus protocolsCarl-Daniel Hailfinger2009-06-016-9/+86
| | | | | | | | | | | | | | | | | | It doesn't make sense to probe for SPI chips on a LPC host, nor does it make sense to probe for LPC chips on a Parallel host. This change is backwards compatible, but adding host protocol info to chipset init functions will speed up probing. Once all chipset init functions are updated and the Winbond W29EE011 and AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can be deleted as the W29/A49 conflict magically disappears. Corresponding to flashrom svn r560. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on real hardware and Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add bus type support to the dummy external programmerCarl-Daniel Hailfinger2009-06-014-1/+53
| | | | | | | | | | | | | | | The syntax is explained in the man page. Example: flashrom -p dummy=lpc,fwh Tested, works perfectly. ;-) As a nice benefit, it allows easy testing of the "probe only compatible flashes" patch. Corresponding to flashrom svn r559. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix warning in satasii.c when compiling with gcc 4.4.0Urja Rannikko2009-05-311-1/+1
| | | | | | | Corresponding to flashrom svn r558. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add IT87xx SPI as external flasher optionCarl-Daniel Hailfinger2009-05-314-4/+36
| | | | | | | | | | This is a fast way to test if a IT87xx board_enable() would work. Corresponding to flashrom svn r557. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
* Add bus type annotation to struct flashchipsCarl-Daniel Hailfinger2009-05-319-85/+270
| | | | | | | | | | | | | | | | | | | Right now, the annotation only differentiates between SPI and non-SPI. Anyone who knows more about a specific flash chip should feel free to update it. The existing flashbus variable was abused to denote the SPI controller type. Use an aptly named variable for that purpose. Once this patch is merged, the chipset/programmer init functions can set supported flash chip types and flashrom can automatically select only matching probe/read/erase/write functions. A side benefit of that will be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict. Corresponding to flashrom svn r556. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for probe and read of Intel 28F001BX-T and BX-BUrja Rannikko2009-05-292-0/+30
| | | | | | | | | | | Erase & write support wont be this easy - the chips need 12V Vpp (needs a hardware hack or a supporting mb) and they have a very weird layout and are old. Corresponding to flashrom svn r555. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Random flashrom updatesUwe Hermann2009-05-283-31/+35
| | | | | | | | | | | | | | | | | | | | - Add explicit installation instructions in the README. - Code cleanups, coding style fixes, drop dead code. - Drop duplicate board listings from -L output (some boards were explicitly recorded in boards_ok[] _and_ implicitly via the board-enables table. - Add MS-xxxx numbers to MSI boards where we can find that info. - Fix typo, "K8T Neo2" should have been "K8T Neo2-F" actually, at least according to the comment of w83627thf_gpio4_4_raise_2e() which says "Suited for: MSI K8T Neo2-F". Corresponding to flashrom svn r554. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* A bunch of flashrom board updatesUwe Hermann2009-05-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marked as OK: - ASUS M2V (reported by Henri Valta <henri.valta@kemi.fi>) http://www.coreboot.org/pipermail/coreboot/2009-May/048674.html - Jetway J7F4K1G5D-PB (reported by Kevin O'Connor <kevin@koconnor.net>) - PC Engines Alix.3d3 (reported by Tobias Müller <Tobias_Mueller@twam.info>) http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html - MSI K7N2 (reported by Maciej Pijanka <maciej.pijanka@gmail.com>) http://www.coreboot.org/pipermail/coreboot/2009-May/048777.html Marked as (so far) non-working: - DFI 855GME-MGF (reported by Tobias Müller <Tobias_Mueller@twam.info>) http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html - ASUS M3N78 Pro (reported by Piotr Esden-Tempski <esden@esden.net>) As discussed on IRC this is an MCP78 chipset with SPI translation apparently done in the southbridge, and we have no NVIDIA datasheets, of course. So the situation for this board will probably not change anytime soon. - MSI MS-6178 (reported by Uwe Hermann <uwe@hermann-uwe.de>) I tested write/erase will not work on this board, so a write-enable is needed. In _addition_, the board immediately powers off if you hot-unplug the PLCC chip, so I guess there's some SMI interference. - GIGABYTE GA-K8N-SLI (reported by Alexander Gordeev <lasaine@lvk.cs.msu.su>) This is currently being discussed on the mailing list (see http://www.coreboot.org/pipermail/coreboot/2009-May/048717.html) and it's very likely that we'll be able to add a board-enable, so this board can be maked as OK soonish. Corresponding to flashrom svn r553. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Change "Texas Instruments" to "TI" in the flash chip tableUwe Hermann2009-05-271-2/+2
| | | | | | | | | | It currently even breaks -L output. We could of course fix that, but we already use short/abbreviated names for other vendors (AMD, ST, SST, PMC) anyway. Corresponding to flashrom svn r552. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Use consistent naming for local chip ID variablesCarl-Daniel Hailfinger2009-05-272-28/+26
| | | | | | | | | | | Every chip besides SPI and w39v080fa uses id1/id2 as local variable names to store ID responses from the flash chip. This eases grepping a lot. As a bonus, it also frees up some names to be used as parameters. Corresponding to flashrom svn r551. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
* Add TI TMS29F002RT and TMS29F002RB probe and read supportCarl-Daniel Hailfinger2009-05-262-0/+31
| | | | | | | Corresponding to flashrom svn r550. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Use REMS instead of RES in the ICH SPI default opcode tableCarl-Daniel Hailfinger2009-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RES is Read Electronic Signature (1 Byte, identical for different chips) REMS is Read Electronic Manufacturer Signature (2 Bytes, mostly unique) RDID is Read JEDEC ID (3 bytes, unique) Of the chips which don't support RDID, a sizable portion supports REMS which gives us both a manufacturer ID and a device ID. This is clearly superior to having only a device ID (the RES case) which has multiple documented collisions. The RES/REMS problem is aggravated by inconsistent naming in vendor data sheets. What's in a name? Considering that we have 1-byte IDs, 2-byte IDs and 3+byte IDs with varying names but mostly consistent opcodes, it makes sense to set our own standard about how the opcodes are called. The best way forward would be to have the ICH SPI driver reprogram the opcode menu on the fly if the opcode menu doesn't contain the requested opcode and the opcode menu is not locked. Until that happens, this patch improves detection accuracy by a factor of 256 for some chips. Corresponding to flashrom svn r549. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Uwe Hermann with the flash chip "SST SST25VF040.REMS". Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Add NForce2 chipset enableLuc Verhaegen2009-05-262-1/+15
| | | | | | | | | | | | | While the other chipset enables for nvidia could potentially also work, this one, by not touching other bits, seems like the safest solution. Uwe tested this on his Asus A7N8X Deluxe, so hopefully the A7N8X-E (reporter unknown) is now no longer an issue. Corresponding to flashrom svn r548. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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