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* Indent according to development guidelinesStefan Reinauer2008-06-271-48/+40
| | | | | | | Corresponding to flashrom svn r277 and coreboot v2 svn r3392. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Winbond W39V080FA: Probe and Read are OKJens Kühnel2008-06-261-1/+1
| | | | | | | Corresponding to flashrom svn r276 and coreboot v2 svn r3390. Signed-off-by: Jens Kühnel <coreboot@jens.kuehnel.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Test status OK for ST M50FW040 PROBE READPeter Stuge2008-06-241-1/+1
| | | | | | | | | Per test report from Alex Perez. Thanks Alex! Corresponding to flashrom svn r275 and coreboot v2 svn r3389. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Test status OK for Macronix MX25L8005 PROBE READ ERASE WRITEPeter Stuge2008-06-241-1/+1
| | | | | | | | | Per test report from Andrew Paprocki. Thanks Andrew! Corresponding to flashrom svn r274 and coreboot v2 svn r3388. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Increase delay in probe_jedec() after Product ID Entry to 10msPeter Stuge2008-06-241-3/+2
| | | | | | | | | | We should follow data sheet timing, even if chips have been tested to answer faster in the field. Corresponding to flashrom svn r273 and coreboot v2 svn r3387. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Slight restructure of SPI probe_ functionsPeter Stuge2008-06-241-47/+53
| | | | | | | | | | | | | | | | Preparation for a probe optimization patch. This patch does not change any functionality. spi_probe_rdid was tested to still work on my M57SLI rev 2. The idea is to have error checks return error immediately when something fails, rather than having code inside an if block where the condition tests for success. This means: Less indentation, more clear what the code is checking. Corresponding to flashrom svn r272 and coreboot v2 svn r3386. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Some flashrom documentation fixes, and removal of duplicated infoUwe Hermann2008-06-222-105/+16
| | | | | | | Corresponding to flashrom svn r271 and coreboot v2 svn r3385. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* A few changes were committed before the DoC remove, update READMEPeter Stuge2008-06-221-1/+1
| | | | | | | Corresponding to flashrom svn r270 and coreboot v2 svn r3384. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Remove dead M-Systems Disk on Chip codePeter Stuge2008-06-226-365/+6
| | | | | | | | | | | | | | DOC support has been disabled by default for many years. The write function does nothing but print text. It has a call to write_page_md2802() commented out, but that function does not exist. This is dead code with ugly #ifdefs. Updates README to reflect that there was a time when there was code, but it didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.* Corresponding to flashrom svn r269 and coreboot v2 svn r3382. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Update test status to TEST_OK_PREW for ST M50FLW080A and SST49LF008APeter Stuge2008-06-221-2/+2
| | | | | | | | | Many thanks to Julio Cesar Costa for the test report! Corresponding to flashrom svn r268 and coreboot v2 svn r3379. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Some Makefile cleaningPeter Stuge2008-06-221-5/+4
| | | | | | | Corresponding to flashrom svn r267 and coreboot v2 svn r3378. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Fix OBJS in Makefile to compile stm50flw0x0x.c like the othersPeter Stuge2008-06-211-1/+1
| | | | | | | Corresponding to flashrom svn r266 and coreboot v2 svn r3377. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Uppercase AMIC since that's what they write in datasheetsPeter Stuge2008-06-211-2/+2
| | | | | | | Corresponding to flashrom svn r265 and coreboot v2 svn r3376. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Update comment to match delay change in probe_jedec() r3373Peter Stuge2008-06-211-1/+1
| | | | | | | Corresponding to flashrom svn r264 and coreboot v2 svn r3375. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Update test status for Atmel AT29C020 and SST29EE010Peter Stuge2008-06-211-2/+2
| | | | | | | | | Thanks to Urja Rannikko for reporting test results with these flash chips. Corresponding to flashrom svn r263 and coreboot v2 svn r3374. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Increase delay in probe_jedec() to 2ms to reliably detect AT29C020Peter Stuge2008-06-211-1/+1
| | | | | | | | | | Run time is increased a few 100ms but this is needed for reliability. I consider this trivial. Corresponding to flashrom svn r262 and coreboot v2 svn r3373. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Show expected and read byte on verify failurePeter Stuge2008-06-201-1/+2
| | | | | | | Corresponding to flashrom svn r261 and coreboot v2 svn r3372. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Add support for AMIC Technology A49LF040A and do not probe W29EE011 anymoreJens Kuehnel2008-06-183-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Jens sent the first patch that added A49LF040A to flash.h and flashchips.c using _jedec and _49lf040 functions. An issue was found with probe_w29ee011() for the Winbond W29EE011, which caused the A49LF040A to no longer respond to any commands. Ward made a patch to disable probing by default for the W29EE011 following some discussion. Using -c W29EE011 will make flashrom probe for the chip. Peter did some more datasheet diving and found that the Pm49FL00x functions suited this chip quite well because of the block locking registers in A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3. Ward confirmed that this works on alix.2c3 too. Corresponding to flashrom svn r260 and coreboot v2 svn r3368. Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org> Signed-off-by: Ward Vandewege <ward@gnu.org> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Force read unknown flash chipsPeter Stuge2008-06-183-10/+47
| | | | | | | | | | | | | | | | | | | When flash chip detection fails, it is still useful and possible to read the flash chip contents. If no flash chip is found in normal probes and the -f -r -c CHIPNAME options are given, a successful probe for the specified chip is forced, and then flashrom reads the flash chip using either the read function for the specified chip, or if there is none, a simple memcpy(). The patch also moves the global variable int force in flashrom.c into main() and passes it as a parameter to layout.c:show_id(), which was the only other function that used the variable. This is needed to avoid confusion with the new parameter int force which is added to flashrom.c:probe_flash() and used to force probe success for the chip named in char *chip_to_probe. Corresponding to flashrom svn r259 and coreboot v2 svn r3367. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org>
* Board enable and autodetection for GIGABYTE GA-7VT600Peter Stuge2008-06-131-0/+3
| | | | | | | | | | Uses the VT8237 ISA bridge with mainboard subsystem ID and Realtek 8139 with mainboard subsystem ID for board detection. Corresponding to flashrom svn r258 and coreboot v2 svn r3366. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
* Add support for Amic Technology A29040B flash chipPeter Stuge2008-06-112-0/+2
| | | | | | | | | PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4. Corresponding to flashrom svn r257 and coreboot v2 svn r3365. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
* Board enable and autodetection for BioStar P4M80-M4Peter Stuge2008-06-111-0/+28
| | | | | | | | | | | | | Thanks to Reinder for clean room reverse engineering and data sheet diving! This board is autodetected because there are some good BioStar subsystem IDs. Matching uses onboard VT6420 SATA RAID with subsystem BioStar 3206 and onboard UniChrome Pro IGP graphics with subsystem BioStar 1202. Corresponding to flashrom svn r256 and coreboot v2 svn r3364. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
* Mark SST SST49LF160C as fully supported.:Peter Stuge2008-06-031-1/+1
| | | | | | | | | | | | | | SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Corresponding to flashrom svn r255 and coreboot v2 svn r3360. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Revert r3357 and fix it as intended to (forgotten header commit instead of typo)Mart Raudsepp2008-05-272-1/+2
| | | | | | | Corresponding to flashrom svn r254 and coreboot v2 svn r3358. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* Fix typo introduced in r3356 that breaks buildMart Raudsepp2008-05-271-1/+1
| | | | | | | Corresponding to flashrom svn r253 and coreboot v2 svn r3357. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* MX25L4005, S25FL016A, W39V040B, W39V080A, SST49LF008A testsPeter Stuge2008-05-271-5/+5
| | | | | | | | | | | | | I have tested MX25L4005, S25FL016A and W39V080A myself. Thanks also to the following testers: SST49LF008A Bernhard M. Wiedemann W39V040B Dan Lenski Corresponding to flashrom svn r252 and coreboot v2 svn r3356. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Mark SST49LF004A/B as testedMart Raudsepp2008-05-271-1/+1
| | | | | | | | | | Tested by me on actual hardware (all operations) - Artec Group DBE62 with SST 49LF004B Corresponding to flashrom svn r251 and coreboot v2 svn r3350. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* Mark the following chips as testedUwe Hermann2008-05-261-5/+5
| | | | | | | | | | | | | | | - AMD Am29F040B - SST SST39SF020A - Winbond W29C020C - Winbond W29EE011 - Winbond W49F002U All of them tested by me on actual hardware (all operations). Corresponding to flashrom svn r250 and coreboot v2 svn r3349. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* A bunch of cosmetic improvementsUwe Hermann2008-05-223-8/+8
| | | | | | | | | | | - Fix typos and inconsistencies. - Drop duplicate line which tells us the chip name twice. - Also print the chip vendor, not only the name. Corresponding to flashrom svn r249 and coreboot v2 svn r3348. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark more chips as tested (all operations), tested on ASUS P4B266Uwe Hermann2008-05-221-3/+3
| | | | | | | Corresponding to flashrom svn r248 and coreboot v2 svn r3347. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the ASUS P4B266 boardUwe Hermann2008-05-221-0/+49
| | | | | | | | | | | | | | | Tested on actual hardware. This patch add an ich_gpio_raise() function which can be re-used by other board-specific funtions which need to raise GPIOs on ICHx southbridges. This also fixes bug #7, see http://tracker.coreboot.org/trac/coreboot/ticket/7, as it turned out the ICH2 (and other ICHx) code works fine. Corresponding to flashrom svn r247 and coreboot v2 svn r3346. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se>
* Add support for Amic A25L40P SPI flashRudolf Marek2008-05-222-0/+2
| | | | | | | Corresponding to flashrom svn r246 and coreboot v2 svn r3345. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Changes to make flashrom compile (and work) on FreeBSDAndriy Gapon2008-05-226-100/+131
| | | | | | | | | | | | This patch addresses different argument order of outX() calls, FreeBSD-specific headers, difference in certain type names and system interface names, and also FreeBSD-specific way of gaining IO port access. Corresponding to flashrom svn r245 and coreboot v2 svn r3344. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Myles reported SST49LF080A status -> TESTED_PREWPeter Stuge2008-05-211-1/+1
| | | | | | | Corresponding to flashrom svn r244 and coreboot v2 svn r3341. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Support Pm49FL004/2 Block Locking RegistersNikolay Petukhov2008-05-175-58/+121
| | | | | | | | | | | | | | | | | | The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Bari Ari <bari@onelabs.com>
* I looked at the datasheet and erase_sector_39sf020() is totally and ↵Carl-Daniel Hailfinger2008-05-161-15/+0
| | | | | | | | | | | | | | | | completely wrong It was a straight cut'n'paste from SST 28SF040 code and the person doing the cut'n'paste didn't even bother to check the data sheet. The SST 39SF020 is completely incompatible with the 28SF040. No need for replacement. According to the data sheet, standard JEDEC commands will work and we have those commands in the tree already. Corresponding to flashrom svn r242 and coreboot v2 svn r3331. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Joseph Smith <joe@settoplinux.org>
* ICH8 and ICH9 have an almost identical SPI interface, only the location of ↵Carl-Daniel Hailfinger2008-05-161-10/+16
| | | | | | | | | | | the SPIBAR differs Add ICH8 support to the ICH9 code. Corresponding to flashrom svn r241 and coreboot v2 svn r3327. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for the Atmel AT25DF321 SPI flash (tested)Dominik Geyer2008-05-161-1/+2
| | | | | | | | | Change ST M25P32 status to tested. Corresponding to flashrom svn r240 and coreboot v2 svn r3326. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for SPI chips on ICH9Dominik Geyer2008-05-165-3/+484
| | | | | | | | | This is done by using the generic SPI interface. Corresponding to flashrom svn r239 and coreboot v2 svn r3325. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* IT8716F: Enable writes if decoding of any SPI addresses is enabledCarl-Daniel Hailfinger2008-05-161-0/+6
| | | | | | | Corresponding to flashrom svn r238 and coreboot v2 svn r3324. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Print detailed status register information for SST25VF series flashCarl-Daniel Hailfinger2008-05-151-0/+4
| | | | | | | Corresponding to flashrom svn r237 and coreboot v2 svn r3323. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Lots of new SST flash chip IDsCarl-Daniel Hailfinger2008-05-152-1/+17
| | | | | | | | | | Only a subset has been added to flashchips.c, but the IDs in flash.h will make lookups easier if anybody wants to add support for them. Corresponding to flashrom svn r236 and coreboot v2 svn r3321. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the JEDEC RESCarl-Daniel Hailfinger2008-05-154-33/+82
| | | | | | | | | | | | | | | | | | Add support for the JEDEC RES (Read Electronic Signature and Resume from Powerdown) SPI command to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Corresponding to flashrom svn r235 and coreboot v2 svn r3320. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
* Add more infrastructure for flashrom ICH9 supportCarl-Daniel Hailfinger2008-05-143-27/+46
| | | | | | | Corresponding to flashrom svn r234 and coreboot v2 svn r3314. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add the Intel 6300ESB as known chipset to the chipset struct enablesClaus Gindhart2008-05-141-0/+1
| | | | | | | Corresponding to flashrom svn r233 and coreboot v2 svn r3310. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix crash caused by division by zero for unknown flash chipsCarl-Daniel Hailfinger2008-05-141-5/+5
| | | | | | | Corresponding to flashrom svn r232 and coreboot v2 svn r3309. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Check the JEDEC vendor ID for correct parityCarl-Daniel Hailfinger2008-05-143-1/+17
| | | | | | | | | | | | Flash chips which can be detected by JEDEC probe routines all have vendor IDs with correct parity. Use a parity check as additional hint whether a vendor ID makes sense. Note: Device IDs have no parity requirements whatsoever. Corresponding to flashrom svn r231 and coreboot v2 svn r3308. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add lots of ATMEL SPI flash chips to flash.hCarl-Daniel Hailfinger2008-05-142-6/+19
| | | | | | | | | Add a few flashchips already mentioned in flash.h to flashchips.c Corresponding to flashrom svn r230 and coreboot v2 svn r3306. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move all IT87xx specific SPI routines from spi.c to a separate file it87spi.cCarl-Daniel Hailfinger2008-05-134-224/+285
| | | | | | | | | No behavioural changes, but greatly improved SPI abstraction. Corresponding to flashrom svn r229 and coreboot v2 svn r3305. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Move the SPI #defines from spi.c to spi.hCarl-Daniel Hailfinger2008-05-132-60/+89
| | | | | | | | | This patch has no code changes. Corresponding to flashrom svn r228 and coreboot v2 svn r3302. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
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