1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
|
/**CFile****************************************************************
FileName [retArea.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Retiming package.]
Synopsis [Min-area retiming.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - Oct 31, 2006.]
Revision [$Id: retArea.c,v 1.00 2006/10/31 00:00:00 alanmi Exp $]
***********************************************************************/
#include "retInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static Abc_Ntk_t * Abc_NtkRetimeMinAreaOne( Abc_Ntk_t * pNtk, int fForward, int fVerbose );
static void Abc_NtkRetimeMinAreaPrepare( Abc_Ntk_t * pNtk, int fForward );
static void Abc_NtkRetimeMinAreaInitValues( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut );
static Abc_Ntk_t * Abc_NtkRetimeMinAreaConstructNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut );
static void Abc_NtkRetimeMinAreaUpdateLatches( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut, int fForward );
extern Abc_Ntk_t * Abc_NtkAttachBottom( Abc_Ntk_t * pNtkTop, Abc_Ntk_t * pNtkBottom );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Performs min-area retiming.]
Description [Returns the number of latches reduced.]
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkRetimeMinArea( Abc_Ntk_t * pNtk, int fForwardOnly, int fBackwardOnly, int fVerbose )
{
Abc_Ntk_t * pNtkTotal = NULL, * pNtkBottom;
Vec_Int_t * vValuesNew = NULL, * vValues;
int nLatches = Abc_NtkLatchNum(pNtk);
int fOneFrame = 0;
assert( !fForwardOnly || !fBackwardOnly );
// there should not be black boxes
assert( Abc_NtkIsSopLogic(pNtk) );
assert( Abc_NtkLatchNum(pNtk) == Vec_PtrSize(pNtk->vBoxes) );
// reorder CI/CO/latch inputs
Abc_NtkOrderCisCos( pNtk );
// perform forward retiming
if ( !fBackwardOnly )
{
if ( fOneFrame )
Abc_NtkRetimeMinAreaOne( pNtk, 1, fVerbose );
else
while ( Abc_NtkRetimeMinAreaOne( pNtk, 1, fVerbose ) );
}
// remember initial values
vValues = Abc_NtkCollectLatchValues( pNtk );
// perform backward retiming
if ( !fForwardOnly )
{
if ( fOneFrame )
pNtkTotal = Abc_NtkRetimeMinAreaOne( pNtk, 0, fVerbose );
else
while ( pNtkBottom = Abc_NtkRetimeMinAreaOne( pNtk, 0, fVerbose ) )
pNtkTotal = Abc_NtkAttachBottom( pNtkTotal, pNtkBottom );
}
// compute initial values
vValuesNew = Abc_NtkRetimeInitialValues( pNtkTotal, vValues, fVerbose );
if ( pNtkTotal ) Abc_NtkDelete( pNtkTotal );
// insert new initial values
Abc_NtkInsertLatchValues( pNtk, vValuesNew );
if ( vValuesNew ) Vec_IntFree( vValuesNew );
if ( vValues ) Vec_IntFree( vValues );
// fix the COs (this changes the circuit structure)
// Abc_NtkLogicMakeSimpleCos( pNtk, 0 );
// check for correctness
if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkRetimeMinArea(): Network check has failed.\n" );
// return the number of latches saved
return nLatches - Abc_NtkLatchNum(pNtk);
}
/**Function*************************************************************
Synopsis [Performs min-area retiming backward.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkRetimeMinAreaOne( Abc_Ntk_t * pNtk, int fForward, int fVerbose )
{
Abc_Ntk_t * pNtkNew = NULL;
Vec_Ptr_t * vMinCut;
int nLatches = Abc_NtkLatchNum(pNtk);
// mark current latches and TFI(POs)
Abc_NtkRetimeMinAreaPrepare( pNtk, fForward );
// run the maximum forward flow
vMinCut = Abc_NtkMaxFlow( pNtk, fForward, fVerbose );
// assert( Vec_PtrSize(vMinCut) <= Abc_NtkLatchNum(pNtk) );
// create new latch boundary if there is improvement
if ( Vec_PtrSize(vMinCut) < Abc_NtkLatchNum(pNtk) )
{
pNtkNew = (Abc_Ntk_t *)1;
if ( fForward )
Abc_NtkRetimeMinAreaInitValues( pNtk, vMinCut );
else
pNtkNew = Abc_NtkRetimeMinAreaConstructNtk( pNtk, vMinCut );
Abc_NtkRetimeMinAreaUpdateLatches( pNtk, vMinCut, fForward );
}
// clean up
Vec_PtrFree( vMinCut );
Abc_NtkCleanMarkA( pNtk );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Marks the cone with MarkA.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkMarkCone_rec( Abc_Obj_t * pObj, int fForward )
{
Abc_Obj_t * pNext;
int i;
if ( pObj->fMarkA )
return;
pObj->fMarkA = 1;
if ( fForward )
{
Abc_ObjForEachFanout( pObj, pNext, i )
Abc_NtkMarkCone_rec( pNext, fForward );
}
else
{
Abc_ObjForEachFanin( pObj, pNext, i )
Abc_NtkMarkCone_rec( pNext, fForward );
}
}
/**Function*************************************************************
Synopsis [Marks the cone with MarkA.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkUnmarkCone_rec( Abc_Obj_t * pObj, int fForward )
{
Abc_Obj_t * pNext;
int i;
if ( !pObj->fMarkA || Abc_ObjIsLatch(pObj) )
return;
pObj->fMarkA = 0;
if ( fForward )
{
Abc_ObjForEachFanout( pObj, pNext, i )
Abc_NtkUnmarkCone_rec( pNext, fForward );
}
else
{
Abc_ObjForEachFanin( pObj, pNext, i )
Abc_NtkUnmarkCone_rec( pNext, fForward );
}
}
/**Function*************************************************************
Synopsis [Prepares the network for running MaxFlow.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkRetimeMinAreaPrepare( Abc_Ntk_t * pNtk, int fForward )
{
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pFanin;
int i, k;
if ( fForward )
{
// mark the frontier
Abc_NtkForEachPo( pNtk, pObj, i )
pObj->fMarkA = 1;
Abc_NtkForEachLatch( pNtk, pObj, i )
{
pObj->fMarkA = 1;
Abc_ObjFanin0(pObj)->fMarkA = 1;
}
// mark the nodes reachable from the PIs
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkMarkCone_rec( pObj, fForward );
// collect the unmarked fanins of the marked nodes
vNodes = Vec_PtrAlloc( 100 );
Abc_NtkForEachObj( pNtk, pObj, i )
if ( pObj->fMarkA )
Abc_ObjForEachFanin( pObj, pFanin, k )
if ( !pFanin->fMarkA )
Vec_PtrPush( vNodes, pFanin );
// mark these nodes
Vec_PtrForEachEntry( vNodes, pObj, i )
pObj->fMarkA = 1;
Vec_PtrFree( vNodes );
}
else
{
// mark the frontier
Abc_NtkForEachPi( pNtk, pObj, i )
pObj->fMarkA = 1;
Abc_NtkForEachLatch( pNtk, pObj, i )
{
pObj->fMarkA = 1;
Abc_ObjFanout0(pObj)->fMarkA = 1;
}
// mark the nodes reachable from the POs
Abc_NtkForEachPo( pNtk, pObj, i )
Abc_NtkMarkCone_rec( pObj, fForward );
}
}
/**Function*************************************************************
Synopsis [Compute initial values.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkRetimeMinAreaInitValues_rec( Abc_Obj_t * pObj )
{
Abc_Obj_t * pFanin;
int i;
// skip visited nodes
if ( Abc_NodeIsTravIdCurrent(pObj) )
return (int)pObj->pCopy;
Abc_NodeSetTravIdCurrent(pObj);
// consider the case of a latch output
if ( Abc_ObjIsBo(pObj) )
{
assert( Abc_ObjIsLatch(Abc_ObjFanin0(pObj)) );
pObj->pCopy = (void *)Abc_NtkRetimeMinAreaInitValues_rec( Abc_ObjFanin0(pObj) );
return (int)pObj->pCopy;
}
assert( Abc_ObjIsNode(pObj) );
// visit the fanins
Abc_ObjForEachFanin( pObj, pFanin, i )
Abc_NtkRetimeMinAreaInitValues_rec( pFanin );
// compute the value of the node
pObj->pCopy = (void *)Abc_ObjSopSimulate(pObj);
return (int)pObj->pCopy;
}
/**Function*************************************************************
Synopsis [Compute initial values.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkRetimeMinAreaInitValues( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut )
{
Abc_Obj_t * pObj;
int i;
// transfer initial values to pCopy and mark the latches
Abc_NtkIncrementTravId(pNtk);
Abc_NtkForEachLatch( pNtk, pObj, i )
{
pObj->pCopy = (void *)Abc_LatchIsInit1(pObj);
Abc_NodeSetTravIdCurrent( pObj );
}
// propagate initial values
Vec_PtrForEachEntry( vMinCut, pObj, i )
Abc_NtkRetimeMinAreaInitValues_rec( pObj );
// unmark the latches
Abc_NtkForEachLatch( pNtk, pObj, i )
Abc_NodeSetTravIdPrevious( pObj );
}
/**Function*************************************************************
Synopsis [Performs min-area retiming backward.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Abc_NtkRetimeMinAreaConstructNtk_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj )
{
Abc_Obj_t * pFanin;
int i;
// skip visited nodes
if ( Abc_NodeIsTravIdCurrent(pObj) )
return pObj->pCopy;
Abc_NodeSetTravIdCurrent(pObj);
// consider the case of a latch output
if ( Abc_ObjIsBi(pObj) )
{
pObj->pCopy = Abc_NtkRetimeMinAreaConstructNtk_rec( pNtkNew, Abc_ObjFanin0(pObj) );
return pObj->pCopy;
}
assert( Abc_ObjIsNode(pObj) );
// visit the fanins
Abc_ObjForEachFanin( pObj, pFanin, i )
Abc_NtkRetimeMinAreaConstructNtk_rec( pNtkNew, pFanin );
// compute the value of the node
Abc_NtkDupObj( pNtkNew, pObj, 0 );
Abc_ObjForEachFanin( pObj, pFanin, i )
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
return pObj->pCopy;
}
/**Function*************************************************************
Synopsis [Creates the network from computing initial state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkRetimeMinAreaConstructNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pObjNew;
int i;
// create new network
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
// map new latches into PIs of the new network
Abc_NtkIncrementTravId(pNtk);
Vec_PtrForEachEntry( vMinCut, pObj, i )
{
pObj->pCopy = Abc_NtkCreatePi(pNtkNew);
Abc_NodeSetTravIdCurrent( pObj );
}
// construct the network recursively
Abc_NtkForEachLatch( pNtk, pObj, i )
{
pObjNew = Abc_NtkRetimeMinAreaConstructNtk_rec( pNtkNew, Abc_ObjFanin0(pObj) );
Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pObjNew );
}
// unmark the nodes in the cut
Vec_PtrForEachEntry( vMinCut, pObj, i )
Abc_NodeSetTravIdPrevious( pObj );
// unmark the latches
Abc_NtkForEachLatch( pNtk, pObj, i )
Abc_NodeSetTravIdPrevious( pObj );
// assign dummy node names
Abc_NtkAddDummyPiNames( pNtkNew );
Abc_NtkAddDummyPoNames( pNtkNew );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkRetimeMinAreaConstructNtk(): Network check has failed.\n" );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Updates the network after backward retiming.]
Description [Assumes that fMarkA denotes all nodes reachabe from
the latches toward the cut.]
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkRetimeMinAreaUpdateLatches( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMinCut, int fForward )
{
Vec_Ptr_t * vCis, * vCos, * vBoxes, * vBoxesNew, * vNodes, * vBuffers;
Abc_Obj_t * pObj, * pLatch, * pLatchIn, * pLatchOut, * pNext, * pBuffer;
int i, k;
// create new latches
Vec_PtrShrink( pNtk->vCis, Abc_NtkCiNum(pNtk) - Abc_NtkLatchNum(pNtk) );
Vec_PtrShrink( pNtk->vCos, Abc_NtkCoNum(pNtk) - Abc_NtkLatchNum(pNtk) );
vCis = pNtk->vCis; pNtk->vCis = NULL;
vCos = pNtk->vCos; pNtk->vCos = NULL;
vBoxes = pNtk->vBoxes; pNtk->vBoxes = NULL;
// transfer boxes
vBoxesNew = Vec_PtrAlloc(100);
Vec_PtrForEachEntry( vBoxes, pObj, i )
if ( !Abc_ObjIsLatch(pObj) )
Vec_PtrPush( vBoxesNew, pObj );
// create or reuse latches
vNodes = Vec_PtrAlloc( 100 );
vBuffers = Vec_PtrAlloc( 100 );
Vec_PtrForEachEntry( vMinCut, pObj, i )
{
if ( Abc_ObjIsCi(pObj) && fForward )
{
pLatchOut = pObj;
pLatch = Abc_ObjFanin0(pLatchOut);
pLatchIn = Abc_ObjFanin0(pLatch);
assert( Abc_ObjIsBo(pLatchOut) && Abc_ObjIsLatch(pLatch) && Abc_ObjIsBi(pLatchIn) );
// mark the latch as reused
Abc_NodeSetTravIdCurrent( pLatch );
// check if there are marked fanouts
// (these are fanouts to be connected to the latch input)
Abc_ObjForEachFanout( pObj, pNext, k )
if ( pNext->fMarkA )
break;
if ( k < Abc_ObjFanoutNum(pObj) )
{
// add the buffer
pBuffer = Abc_NtkCreateNodeBuf( pNtk, Abc_ObjFanin0(pLatchIn) );
Abc_ObjPatchFanin( pLatchIn, Abc_ObjFanin0(pLatchIn), pBuffer );
Vec_PtrPush( vBuffers, pBuffer );
// redirect edges to the unvisited fanouts of the node
Abc_NodeCollectFanouts( pObj, vNodes );
Vec_PtrForEachEntry( vNodes, pNext, k )
if ( pNext->fMarkA )
Abc_ObjPatchFanin( pNext, pObj, pBuffer );
}
assert( Abc_ObjFanoutNum(pObj) > 0 );
// if ( Abc_ObjFanoutNum(pObj) == 0 )
// Abc_NtkDeleteObj_rec( pObj, 0 );
}
else if ( Abc_ObjIsCo(pObj) && !fForward )
{
pLatchIn = pObj;
pLatch = Abc_ObjFanout0(pLatchIn);
pLatchOut = Abc_ObjFanout0(pLatch);
assert( Abc_ObjIsBo(pLatchOut) && Abc_ObjIsLatch(pLatch) && Abc_ObjIsBi(pLatchIn) );
// mark the latch as reused
Abc_NodeSetTravIdCurrent( pLatch );
assert( !Abc_ObjFanin0(pLatchIn)->fMarkA );
}
else
{
pLatchOut = Abc_NtkCreateBo(pNtk);
pLatch = Abc_NtkCreateLatch(pNtk);
pLatchIn = Abc_NtkCreateBi(pNtk);
Abc_ObjAssignName( pLatchOut, Abc_ObjName(pLatch), "_out" );
Abc_ObjAssignName( pLatchIn, Abc_ObjName(pLatch), "_in" );
// connect
Abc_ObjAddFanin( pLatchOut, pLatch );
Abc_ObjAddFanin( pLatch, pLatchIn );
if ( fForward )
{
pLatch->pData = (void *)(pObj->pCopy? ABC_INIT_ONE : ABC_INIT_ZERO);
// redirect edges to the unvisited fanouts of the node
Abc_NodeCollectFanouts( pObj, vNodes );
Vec_PtrForEachEntry( vNodes, pNext, k )
if ( !pNext->fMarkA )
Abc_ObjPatchFanin( pNext, pObj, pLatchOut );
}
else
{
// redirect edges to the visited fanouts of the node
Abc_NodeCollectFanouts( pObj, vNodes );
Vec_PtrForEachEntry( vNodes, pNext, k )
if ( pNext->fMarkA )
Abc_ObjPatchFanin( pNext, pObj, pLatchOut );
}
// connect latch to the node
Abc_ObjAddFanin( pLatchIn, pObj );
}
Vec_PtrPush( vCis, pLatchOut );
Vec_PtrPush( vBoxesNew, pLatch );
Vec_PtrPush( vCos, pLatchIn );
}
Vec_PtrFree( vNodes );
// remove buffers
Vec_PtrForEachEntry( vBuffers, pObj, i )
{
Abc_ObjTransferFanout( pObj, Abc_ObjFanin0(pObj) );
Abc_NtkDeleteObj( pObj );
}
Vec_PtrFree( vBuffers );
// remove useless latches
Vec_PtrForEachEntry( vBoxes, pObj, i )
{
if ( !Abc_ObjIsLatch(pObj) )
continue;
if ( Abc_NodeIsTravIdCurrent(pObj) )
continue;
pLatchOut = Abc_ObjFanout0(pObj);
pLatch = pObj;
pLatchIn = Abc_ObjFanin0(pObj);
if ( Abc_ObjFanoutNum(pLatchOut) > 0 )
Abc_ObjTransferFanout( pLatchOut, Abc_ObjFanin0(pLatchIn) );
Abc_NtkDeleteObj( pLatchOut );
Abc_NtkDeleteObj( pObj );
Abc_NtkDeleteObj( pLatchIn );
}
// set the arrays
pNtk->vCis = vCis;
pNtk->vCos = vCos;
pNtk->vBoxes = vBoxesNew;
Vec_PtrFree( vBoxes );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
|