-- Synthesis context. -- Copyright (C) 2017 Tristan Gingold -- -- This file is part of GHDL. -- -- This program is free software: you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation, either version 2 of the License, or -- (at your option) any later version. -- -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with this program. If not, see . with Ada.Unchecked_Conversion; with Tables; with Types_Utils; use Types_Utils; with Netlists.Folds; use Netlists.Folds; with Synth.Vhdl_Expr; use Synth.Vhdl_Expr; with Netlists.Locations; package body Synth.Vhdl_Context is package Extra_Tables is new Tables (Table_Component_Type => Extra_Vhdl_Instance_Type, Table_Index_Type => Instance_Id_Type, Table_Low_Bound => First_Instance_Id, Table_Initial => 16); procedure Resize_Extra_Tables (Id : Instance_Id_Type) is begin while Id > Extra_Tables.Last loop Extra_Tables.Append ((Base => null, Name => No_Sname)); end loop; end Resize_Extra_Tables; procedure Set_Extra (Inst : Synth_Instance_Acc; Extra : Extra_Vhdl_Instance_Type) is Id : constant Instance_Id_Type := Get_Instance_Id (Inst); begin Resize_Extra_Tables (Id); Extra_Tables.Table (Id) := Extra; end Set_Extra; procedure Make_Base_Instance (Base : Base_Instance_Acc) is begin Set_Extra (Root_Instance, (Base => Base, Name => No_Sname)); end Make_Base_Instance; procedure Free_Base_Instance is begin -- TODO: really free. null; end Free_Base_Instance; function Get_Instance_Extra (Inst : Synth_Instance_Acc) return Extra_Vhdl_Instance_Type is begin return Extra_Tables.Table (Get_Instance_Id (Inst)); end Get_Instance_Extra; procedure Set_Extra (Inst : Synth_Instance_Acc; Base : Base_Instance_Acc; Name : Sname := No_Sname) is begin Set_Extra (Inst, (Base => Base, Name => Name)); end Set_Extra; procedure Set_Extra (Inst : Synth_Instance_Acc; Parent : Synth_Instance_Acc; Name : Sname := No_Sname) is Id : constant Instance_Id_Type := Get_Instance_Id (Inst); begin Resize_Extra_Tables (Id); Extra_Tables.Table (Id) := (Base => Get_Instance_Extra (Parent).Base, Name => Name); end Set_Extra; function Make_Instance (Parent : Synth_Instance_Acc; Blk : Node; Name : Sname := No_Sname) return Synth_Instance_Acc is Res : Synth_Instance_Acc; begin Res := Make_Elab_Instance (Parent, Blk, Null_Node); Set_Extra (Res, Parent, Name); return Res; end Make_Instance; procedure Set_Instance_Base (Inst : Synth_Instance_Acc; Base : Base_Instance_Acc) is begin Extra_Tables.Table (Get_Instance_Id (Inst)).Base := Base; end Set_Instance_Base; procedure Set_Instance_Base (Inst : Synth_Instance_Acc; Base : Synth_Instance_Acc) is begin Set_Instance_Base (Inst, Get_Instance_Extra (Base).Base); end Set_Instance_Base; procedure Free_Instance (Synth_Inst : in out Synth_Instance_Acc) is begin if Get_Instance_Id (Synth_Inst) = Extra_Tables.Last then Extra_Tables.Decrement_Last; end if; Free_Elab_Instance (Synth_Inst); end Free_Instance; procedure Set_Instance_Module (Inst : Synth_Instance_Acc; M : Module) is Prev_Base : constant Base_Instance_Acc := Get_Instance_Extra (Inst).Base; Base : Base_Instance_Acc; Self_Inst : Instance; begin Base := new Base_Instance_Type'(Builder => Prev_Base.Builder, Top_Module => Prev_Base.Top_Module, Cur_Module => M); Builders.Set_Parent (Base.Builder, M); Self_Inst := Create_Self_Instance (M); pragma Unreferenced (Self_Inst); Set_Instance_Base (Inst, Base); end Set_Instance_Module; function Get_Instance_Module (Inst : Synth_Instance_Acc) return Module is begin return Extra_Tables.Table (Get_Instance_Id (Inst)).Base.Cur_Module; end Get_Instance_Module; function Get_Top_Module (Inst : Synth_Instance_Acc) return Module is begin return Extra_Tables.Table (Get_Instance_Id (Inst)).Base.Top_Module; end Get_Top_Module; function Get_Sname (Inst : Synth_Ins
/**CFile****************************************************************

  FileName    [util_hack.h]

  SystemName  [ABC: Logic synthesis and verification system.]

  PackageName [This file is used to simulate the presence of "util.h".]

  Synopsis    [External declarations.]

  Author      [Alan Mishchenko]
  
  Affiliation [UC Berkeley]

  Date        [Ver. 1.0. Started - June 20, 2005.]

  Revision    [$Id: util_hack.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]

***********************************************************************/

#ifndef __UTIL_HACK_H__
#define __UTIL_HACK_H__

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include <time.h>
#include <math.h>

#include "abc_global.h"

ABC_NAMESPACE_HEADER_START

#define NIL(type)           ((type *) 0)

#define util_cpu_time       Extra_CpuTime            
#define getSoftDataLimit    Extra_GetSoftDataLimit   
#define MMoutOfMemory       Extra_UtilMMoutOfMemory      

extern long                 Extra_CpuTime();
extern int                  Extra_GetSoftDataLimit();
extern void               (*Extra_UtilMMoutOfMemory)( long size );

ABC_NAMESPACE_HEADER_END

#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-11 14:51:38 +0000
, Val.Val.C_Val)); Val.Val.C_Net := To_Uns32 (N); Locations.Set_Location (Get_Net_Parent (N), Get_Location (Val.Val.C_Loc)); end if; return N; end; when Value_Memory => return Get_Memtyp_Net (Ctxt, Get_Memtyp (Val)); when others => raise Internal_Error; end case; end Get_Net; function Is_Static_Val (Val : Value_Acc) return Boolean is begin case Val.Kind is when Value_Memory => return True; when Value_Net | Value_Signal => return False; when Value_Wire => declare W : constant Wire_Id := Get_Value_Wire (Val); begin if Get_Kind (W) = Wire_Variable then return Is_Static_Wire (W); else -- A signal does not have static values. return False; end if; end; when Value_File => return True; when Value_Const => return True; when Value_Alias => return Is_Static_Val (Val.A_Obj); end case; end Is_Static_Val; end Synth.Vhdl_Context;