From 69c36f426cbe6d6a7aeff9130326abcd1c202ac7 Mon Sep 17 00:00:00 2001
From: Alan Mishchenko <alanmi@berkeley.edu>
Date: Thu, 30 Aug 2012 12:34:53 -0700
Subject: Improvements to gate-sizing.

---
 src/map/scl/sclUtil.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/map/scl/sclUtil.c')

diff --git a/src/map/scl/sclUtil.c b/src/map/scl/sclUtil.c
index 0356e83d..b541bfc8 100644
--- a/src/map/scl/sclUtil.c
+++ b/src/map/scl/sclUtil.c
@@ -137,11 +137,13 @@ void Abc_SclLinkCells( SC_Lib * p )
         // create new representative
         pRepr = Vec_PtrEntry( vList, 0 );
         pRepr->pNext = pRepr->pPrev = pRepr;
+        pRepr->Order = 0;
         // relink cells
         Vec_PtrForEachEntryStart( SC_Cell *, vList, pCell, i, 1 )
         {
             pRepr->pPrev->pNext = pCell; pCell->pNext = pRepr;
             pCell->pPrev = pRepr->pPrev; pRepr->pPrev = pCell;
+            pCell->Order = i;
         }
         // update list
         Vec_PtrWriteEntry( p->vCellOrder, k, pRepr );
-- 
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