From 559f8f5b5eca41b30e3ee7946a32a03437ad80b8 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sun, 3 May 2020 12:09:55 -0700 Subject: Adding dumping of genlib library in Verilog. --- src/map/mio/exp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/map/mio/exp.h b/src/map/mio/exp.h index 828d81c9..adbc2f58 100644 --- a/src/map/mio/exp.h +++ b/src/map/mio/exp.h @@ -123,7 +123,7 @@ static inline void Exp_Print( int nVars, Vec_Int_t * p ) } static inline void Exp_PrintNodeVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Node, int fCompl ) { - extern void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit ); + static void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit ); if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars ) fprintf( pFile, "(" ); Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+1) ^ fCompl ); -- cgit v1.2.3