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| * Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-014-32/+255
| * Allow retiming to skip some logic.Alan Mishchenko2021-07-314-9/+69
| * Upgrading choice computation.Alan Mishchenko2021-07-315-27/+38
| * Experiments with cofactoring.Alan Mishchenko2021-07-312-6/+288
| * Experimental simulation commands.Alan Mishchenko2021-07-256-67/+575
| * Command to move CI/CO names.Alan Mishchenko2021-07-161-2/+3
| * Command to move CI/CO names.Alan Mishchenko2021-07-163-7/+237
| * Several unrelated changes.Alan Mishchenko2021-07-154-9/+186
| * Experiments with LUT mapping for small functions.Alan Mishchenko2021-07-135-4/+479
| * Experiments with MUX decomposition.Alan Mishchenko2021-07-111-1/+1
| * Experiments with CEC.Alan Mishchenko2021-07-104-9/+171
| * Simple AIGER reader/writer.Alan Mishchenko2021-07-091-0/+141
| * Experiments with MUX decomposition.Alan Mishchenko2021-07-081-1/+0
| * Experiments with MUX decomposition.Alan Mishchenko2021-07-082-4/+5
| * Experiments with MUX decomposition.Alan Mishchenko2021-07-082-1/+134
| * Potential upgrade to 'dsec'.Alan Mishchenko2021-06-251-0/+24
| * Adding place holder file for resub experiments.Alan Mishchenko2021-06-244-7/+63
| * Experiments with LUT mapping for small functions.Alan Mishchenko2021-06-197-67/+963
| * Experiments with cut computation.Alan Mishchenko2021-06-082-2/+44
| * Experiments with cut computation.Alan Mishchenko2021-06-052-4/+144
| * Disabled special handling of 2-input LUTs.Alan Mishchenko2021-06-031-1/+1
| * Disabled special handling of 2-input LUTs.Alan Mishchenko2021-06-021-2/+4
| * Updating LUT synthesis code.Alan Mishchenko2021-05-264-7/+7
| * Updating LUT synthesis code.Alan Mishchenko2021-05-253-66/+287
| * Adding command &extract.Alan Mishchenko2021-05-182-1/+84
| * Fixing memory leak in the SAT sweeper.Alan Mishchenko2021-05-161-1/+1
| * Updating LUT synthesis code.Alan Mishchenko2021-05-161-1/+2
| * Updating LUT synthesis code.Alan Mishchenko2021-05-168-127/+604
| * Adding switch muxes -a to create networks of ADDs.Alan Mishchenko2021-05-154-15/+38
| * Updating LUT synthesis code.Alan Mishchenko2021-05-112-38/+102
| * Disable cube-sort when deriving SOPs.Alan Mishchenko2021-05-1111-21/+31
| * Updating LUT synthesis code.Alan Mishchenko2021-05-115-46/+301
| * Updating LUT synthesis code.Alan Mishchenko2021-05-084-2/+220
| * Fixing mismatch in &cec -x which should return undecided rather than non-equi...Alan Mishchenko2021-05-081-1/+1
| * Updating cost function in &save/&load.Alan Mishchenko2021-05-081-1/+1
| * Updating cost function in &save/&load.Alan Mishchenko2021-05-081-8/+27
| * Bug fix in &blut.Alan Mishchenko2021-05-081-8/+14
| * Experiments with LUT mapping for small functions.Alan Mishchenko2021-05-014-4/+226
| * Making sure read_bench can read nodes up to 15 inputs.Alan Mishchenko2021-04-302-5/+6
| * Several changes for standard mapping.Alan Mishchenko2021-04-283-5/+18
| * Upgrade to the circuit-based solver.Alan Mishchenko2021-04-2712-367/+686
| * Passing node labels.Alan Mishchenko2021-04-263-0/+10
| * Computing sum of PO support sizes.Alan Mishchenko2021-04-092-1/+61
| * Making default value (-M 0) work correctly in &mfs.Alan Mishchenko2021-04-071-6/+6
| * An option to extend the number of primary inputs.Alan Mishchenko2021-03-283-3/+65
| * Compiler warnings.Alan Mishchenko2021-03-281-3/+3
| * Compiler warnings.Alan Mishchenko2021-03-281-3/+4
| * Command &iwls21test for evaluating the results of 2021 IWLS Contest.Alan Mishchenko2021-03-284-0/+613
| * Adding a random seed to control randomness in 'permute' (correction).Alan Mishchenko2021-03-111-2/+2
| * Adding a random seed to control randomness in 'permute'.Alan Mishchenko2021-03-111-2/+17
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