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* Variable timeframe abstraction.Alan Mishchenko2012-01-161-211/+159
* New hierarchy manager.Alan Mishchenko2012-01-161-0/+216
* Removing additional printout in the GIA package.Alan Mishchenko2012-01-161-15/+5
* New hierarchy manager plus additional printout in the GIA package.Alan Mishchenko2012-01-165-11/+34
* Variable timeframe abstraction.Alan Mishchenko2012-01-163-132/+274
* Variable timeframe abstraction.Alan Mishchenko2012-01-157-169/+535
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-151-1/+44
* Several small bug fixes in the mapper.Alan Mishchenko2012-01-153-4/+7
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-141-2/+1
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-143-48/+142
* Bug fixes in the Verilog parser.Alan Mishchenko2012-01-144-6/+16
* New hierarchy manager.Alan Mishchenko2012-01-144-57/+160
* Support computation experiments with different network data-structures.Alan Mishchenko2012-01-143-0/+127
* Small bug fix in printing DSD for Boolean functions.Alan Mishchenko2012-01-141-1/+1
* New hierarchy manager.Alan Mishchenko2012-01-133-10/+53
* New hierarchy manager.Alan Mishchenko2012-01-133-19/+18
* New hierarchy manager.Alan Mishchenko2012-01-134-1/+63
* Improving printout in the SAT solver.Alan Mishchenko2012-01-132-2/+4
* Commented out a printout line which cases a warning to be printed.Alan Mishchenko2012-01-131-1/+1
* Added bit vector.Alan Mishchenko2012-01-132-0/+580
* Added counting hits and misses during structural hashing.Alan Mishchenko2012-01-134-2/+10
* New hierarchy manager.Alan Mishchenko2012-01-131-3/+12
* New hierarchy manager.Alan Mishchenko2012-01-132-31/+206
* Added new name manager and modified hierarchy manager to use it.Alan Mishchenko2012-01-136-82/+761
* New hierarchy manager.Alan Mishchenko2012-01-132-0/+445
* Added model ID inside the design.Alan Mishchenko2012-01-122-0/+3
* Bug fix related to not properly resizing SAT solver's model array.Alan Mishchenko2012-01-122-0/+2
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-116-202/+566
* Gate level abstraction.Alan Mishchenko2012-01-111-109/+627
* Gate level abstraction.Alan Mishchenko2012-01-082-59/+305
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-081-5/+31
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-071-9/+13
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-071-13/+12
* Crash fix in 'tempor' in case the leading length is 0.Alan Mishchenko2012-01-071-0/+6
* Gate level abstraction.Alan Mishchenko2012-01-071-238/+78
* Bug fix: changing output number to 0 in the CEX after ORing POs.Alan Mishchenko2012-01-071-0/+3
* Bug fix related to not properly resizing SAT solver's model array.Alan Mishchenko2012-01-0611-151/+45
* Added warning when the network from file has no primary inputs.Alan Mishchenko2012-01-061-0/+5
* APIs to represent simple gates in CNF.Alan Mishchenko2012-01-051-0/+112
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-053-217/+250
* APIs to represent simple gates in CNF.Alan Mishchenko2012-01-051-0/+100
* Configuration changes in the Boolean matching code.Alan Mishchenko2012-01-051-1/+1
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-011-0/+442
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-014-13/+479
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-4/+11
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-1/+3
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-29/+29
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-5/+80
* Delay optimization using precomputed library.Alan Mishchenko2011-12-296-186/+1072
* New variable-time frame abstraction.Alan Mishchenko2011-12-293-8/+523
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