iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	New hierarchy manager.	Alan Mishchenko	2012-01-19	1	-5/+195
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*	New hierarchy manager.	Alan Mishchenko	2012-01-19	2	-21/+29
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*	Replaced 'bmc' by 'bmc2' in 'dprove'. Added switches to 'dprove' to control ↵	Alan Mishchenko	2012-01-19	2	-17/+45
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*	New hierarchy manager.	Alan Mishchenko	2012-01-19	1	-6/+32
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*	Added switch 'write_counter -f' to output flop values in each time frame.	Alan Mishchenko	2012-01-18	1	-20/+31
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*	New hierarchy manager.	Alan Mishchenko	2012-01-18	1	-2/+36
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*	New hierarchy manager.	Alan Mishchenko	2012-01-18	1	-4/+133
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-17	2	-24/+360
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*	New hierarchy manager.	Alan Mishchenko	2012-01-17	1	-6/+158
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*	New hierarchy manager.	Alan Mishchenko	2012-01-17	2	-48/+219
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*	New hierarchy manager.	Alan Mishchenko	2012-01-16	1	-0/+216
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*	New hierarchy manager plus additional printout in the GIA package.	Alan Mishchenko	2012-01-16	2	-9/+16
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*	Variable timeframe abstraction.	Alan Mishchenko	2012-01-16	1	-2/+120
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*	Variable timeframe abstraction.	Alan Mishchenko	2012-01-15	1	-6/+4
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-15	1	-1/+44
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*	Several small bug fixes in the mapper.	Alan Mishchenko	2012-01-15	1	-1/+1
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-14	1	-2/+1
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-14	3	-48/+142
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*	Bug fixes in the Verilog parser.	Alan Mishchenko	2012-01-14	4	-6/+16
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*	New hierarchy manager.	Alan Mishchenko	2012-01-14	3	-56/+159
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*	Support computation experiments with different network data-structures.	Alan Mishchenko	2012-01-14	1	-0/+64
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	3	-10/+53
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	3	-19/+18
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	3	-0/+41
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*	Added counting hits and misses during structural hashing.	Alan Mishchenko	2012-01-13	1	-1/+2
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	1	-3/+12
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	2	-31/+206
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*	Added new name manager and modified hierarchy manager to use it.	Alan Mishchenko	2012-01-13	2	-82/+169
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	2	-0/+445
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*	Added model ID inside the design.	Alan Mishchenko	2012-01-12	2	-0/+3
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-11	3	-201/+563
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*	Gate level abstraction.	Alan Mishchenko	2012-01-08	1	-3/+6
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*	Bug fix: changing output number to 0 in the CEX after ORing POs.	Alan Mishchenko	2012-01-07	1	-0/+3
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*	Added warning when the network from file has no primary inputs.	Alan Mishchenko	2012-01-06	1	-0/+5
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-01	1	-3/+106
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-4/+11
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-1/+3
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-29/+29
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-5/+80
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-29	4	-179/+1053
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*	New variable-time frame abstraction.	Alan Mishchenko	2011-12-29	1	-8/+6
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*	Experiments with flattening hierarchy.	Alan Mishchenko	2011-12-28	1	-27/+274
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*	Added switch -n to 'miter' to ignore PI/PO names.	Alan Mishchenko	2011-12-22	1	-3/+15
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*	Computing interpolants as truth tables.	Alan Mishchenko	2011-12-22	1	-1/+2
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*	Improvements to hierarchical BLIF parser.	Alan Mishchenko	2011-12-22	1	-4/+6
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*	Improvements to hierarchical BLIF parser.	Alan Mishchenko	2011-12-21	1	-7/+34
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*	Fixed a bug in matching code.	Alan Mishchenko	2011-12-17	1	-1/+4
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*	Added optional printout of the hierarchy structure before collapsing.	Alan Mishchenko	2011-12-15	1	-0/+1
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*	Adding switch '-W' to fx to control the quality of extracted divisors.	Alan Mishchenko	2011-12-15	1	-4/+16
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*	Trying to make sorting of nodes platform-indendent.	Alan Mishchenko	2011-12-15	3	-0/+15
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