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yosys-experimental
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abclib.dsp
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Author
Age
Files
Lines
*
Synthesis for mesh of LUTs.
Alan Mishchenko
2017-03-17
1
-0
/
+4
*
Synthesis for mesh of LUTs.
Alan Mishchenko
2017-03-17
1
-0
/
+4
*
New word-level transformation.
Alan Mishchenko
2017-03-17
1
-0
/
+4
*
Improvements to ternary simulation.
Alan Mishchenko
2017-03-09
1
-0
/
+4
*
Improvements to ternary simulation.
Alan Mishchenko
2017-03-09
1
-0
/
+4
*
Clone of the main SAT solver to eneable independent work.
Alan Mishchenko
2017-03-03
1
-0
/
+8
*
Moving global declarations into 'abcapi.h' and moving it into 'main' package.
Alan Mishchenko
2017-03-02
1
-0
/
+4
*
Adding experimental command.
Alan Mishchenko
2017-03-02
1
-0
/
+4
*
Changes to Visual Studio project file to support 'pdra'.
Alan Mishchenko
2017-02-21
1
-0
/
+4
*
Experiments with SAT sweeping.
Alan Mishchenko
2017-02-18
1
-0
/
+4
*
Word-level abstraction engine.
Alan Mishchenko
2017-02-15
1
-0
/
+4
*
Movinng custom floating-point implementations, etc.
Alan Mishchenko
2017-02-11
1
-12
/
+12
*
Changes to compile on Windows.
Alan Mishchenko
2017-02-10
1
-0
/
+4
*
Word-level abstraction.
Alan Mishchenko
2017-02-09
1
-0
/
+8
*
Autotuner for 'satoko'.
Alan Mishchenko
2017-02-08
1
-0
/
+4
*
New command &satoko.
Alan Mishchenko
2017-02-08
1
-0
/
+4
*
Small changes to compile satoko on Windows.
Alan Mishchenko
2017-02-06
1
-0
/
+84
*
Enabling new X-valued simulation in 'pdr'.
Alan Mishchenko
2017-02-03
1
-0
/
+4
*
Updates to arithmetic verification.
Alan Mishchenko
2017-01-30
1
-0
/
+4
*
Updates to arithmetic verification.
Alan Mishchenko
2017-01-28
1
-0
/
+8
*
Adding visualization of word-level networks Wlc_Ntk_t.
Alan Mishchenko
2017-01-26
1
-0
/
+4
*
Updates to arithmetic verification.
Alan Mishchenko
2017-01-12
1
-0
/
+4
*
Updates to arithmetic verification.
Alan Mishchenko
2017-01-11
1
-0
/
+4
*
Updates to arithmetic verification.
Alan Mishchenko
2017-01-10
1
-0
/
+4
*
Updates to delay optimization project.
Alan Mishchenko
2017-01-02
1
-0
/
+4
*
Updates to delay optimization project.
Alan Mishchenko
2017-01-01
1
-0
/
+4
*
Updates to delay optimization project.
Alan Mishchenko
2016-12-27
1
-0
/
+4
*
Updates to delay optimization project.
Alan Mishchenko
2016-12-25
1
-0
/
+4
*
Several changes in arithmetic circuit manipulation.
Alan Mishchenko
2016-12-22
1
-0
/
+4
*
Bug fix in 'dsat <file.cnf>' when the number of classes in listed incorrectly.
Alan Mishchenko
2016-12-13
1
-0
/
+48
*
Adding support for minimalistic representation of LUT mapping.
Alan Mishchenko
2016-12-05
1
-0
/
+4
*
Changes to arithmetic logic detection.
Alan Mishchenko
2016-12-02
1
-0
/
+12
*
New command to profile arithmetic logic cones.
Alan Mishchenko
2016-11-26
1
-0
/
+4
*
New SAT-based optimization package.
Alan Mishchenko
2016-11-17
1
-0
/
+32
*
Fixed several compiler warnings.
Alan Mishchenko
2016-11-17
1
-0
/
+12
*
Isolating CBA types into a separate header.
Alan Mishchenko
2016-11-07
1
-0
/
+4
*
Parser for JSON format.
Alan Mishchenko
2016-10-25
1
-0
/
+8
*
Code for profiling arithmetic circuits.
Alan Mishchenko
2016-10-21
1
-0
/
+4
*
Experimental code for polynomial construction.
Alan Mishchenko
2016-09-05
1
-0
/
+4
*
Experimental code for polynomial construction.
Alan Mishchenko
2016-09-03
1
-0
/
+8
*
Updates to arithmetic verification.
Alan Mishchenko
2016-08-05
1
-0
/
+4
*
Adding new command 'dump_equiv'.
Alan Mishchenko
2016-07-21
1
-0
/
+4
*
Fix in reading initial state for edge-detection.
Alan Mishchenko
2016-07-19
1
-0
/
+4
*
New multi-output PLA reader and preprocessor (read_plamo).
Alan Mishchenko
2016-06-16
1
-0
/
+4
*
Experiments with edge-based mapping.
Alan Mishchenko
2016-06-15
1
-0
/
+4
*
Detecting properties of internal nodes.
Alan Mishchenko
2016-06-07
1
-0
/
+4
*
New feature for area minimization in standard cell mapping.
Alan Mishchenko
2016-05-19
1
-0
/
+4
*
Experiments with generating sat assignments.
Alan Mishchenko
2016-05-15
1
-0
/
+4
*
New command 'expand' to expand SOPs against the offset.
Alan Mishchenko
2016-05-12
1
-0
/
+4
*
Cosmetic changes after incorporating new code of 'fxch'.
Alan Mishchenko
2016-05-11
1
-4
/
+24
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