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-rw-r--r--src/opt/sim/sim.h24
-rw-r--r--src/opt/sim/simMan.c9
-rw-r--r--src/opt/sim/simSat.c5
-rw-r--r--src/opt/sim/simSeq.c5
-rw-r--r--src/opt/sim/simSupp.c49
-rw-r--r--src/opt/sim/simSwitch.c11
-rw-r--r--src/opt/sim/simSym.c5
-rw-r--r--src/opt/sim/simSymSat.c13
-rw-r--r--src/opt/sim/simSymSim.c17
-rw-r--r--src/opt/sim/simSymStr.c23
-rw-r--r--src/opt/sim/simUtils.c63
11 files changed, 139 insertions, 85 deletions
diff --git a/src/opt/sim/sim.h b/src/opt/sim/sim.h
index 89eaafac..e1a34273 100644
--- a/src/opt/sim/sim.h
+++ b/src/opt/sim/sim.h
@@ -21,6 +21,7 @@
#ifndef __SIM_H__
#define __SIM_H__
+
/*
The ideas realized in this package are described in the paper:
"Detecting Symmetries in Boolean Functions using Circuit Representation,
@@ -35,9 +36,10 @@
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
-#ifdef __cplusplus
-extern "C" {
-#endif
+
+
+ABC_NAMESPACE_HEADER_START
+
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
@@ -197,15 +199,15 @@ extern void Sim_SymmsStructCompute( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMa
/*=== simSymSim.c ==========================================================*/
extern void Sim_SymmsSimulate( Sym_Man_t * p, unsigned * pPatRand, Vec_Ptr_t * vMatrsNonSym );
/*=== simUtil.c ==========================================================*/
-extern Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, bool fClean );
+extern Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, int fClean );
extern void Sim_UtilInfoFree( Vec_Ptr_t * p );
extern void Sim_UtilInfoAdd( unsigned * pInfo1, unsigned * pInfo2, int nWords );
extern void Sim_UtilInfoDetectDiffs( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs );
extern void Sim_UtilInfoDetectNews( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs );
extern void Sim_UtilInfoFlip( Sim_Man_t * p, Abc_Obj_t * pNode );
-extern bool Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode );
-extern void Sim_UtilSimulate( Sim_Man_t * p, bool fFirst );
-extern void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fType1, bool fType2 );
+extern int Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode );
+extern void Sim_UtilSimulate( Sim_Man_t * p, int fFirst );
+extern void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, int fType, int fType1, int fType2 );
extern void Sim_UtilSimulateNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords, int nOffset );
extern void Sim_UtilTransferNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords, int nOffset, int fShift );
extern int Sim_UtilCountSuppSizes( Sim_Man_t * p, int fStruct );
@@ -221,9 +223,11 @@ extern int Sim_UtilCountAllPairs( Vec_Ptr_t * vSuppFun, int nSimWord
extern void Sim_UtilCountPairsAll( Sym_Man_t * p );
extern int Sim_UtilMatrsAreDisjoint( Sym_Man_t * p );
-#ifdef __cplusplus
-}
-#endif
+
+
+ABC_NAMESPACE_HEADER_END
+
+
#endif
diff --git a/src/opt/sim/simMan.c b/src/opt/sim/simMan.c
index 6a86e25f..234aa412 100644
--- a/src/opt/sim/simMan.c
+++ b/src/opt/sim/simMan.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -102,8 +105,8 @@ void Sym_ManStop( Sym_Man_t * p )
if ( p->vSupports ) Vec_VecFree( p->vSupports );
for ( i = 0; i < p->nOutputs; i++ )
{
- Extra_BitMatrixStop( p->vMatrSymms->pArray[i] );
- Extra_BitMatrixStop( p->vMatrNonSymms->pArray[i] );
+ Extra_BitMatrixStop( (Extra_BitMat_t *)p->vMatrSymms->pArray[i] );
+ Extra_BitMatrixStop( (Extra_BitMat_t *)p->vMatrNonSymms->pArray[i] );
}
Vec_IntFree( p->vVarsU );
Vec_IntFree( p->vVarsV );
@@ -286,3 +289,5 @@ void Sim_ManPatFree( Sim_Man_t * p, Sim_Pat_t * pPat )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSat.c b/src/opt/sim/simSat.c
index d514f7f2..29fc6975 100644
--- a/src/opt/sim/simSat.c
+++ b/src/opt/sim/simSat.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -46,3 +49,5 @@
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSeq.c b/src/opt/sim/simSeq.c
index 49fb939f..db05226f 100644
--- a/src/opt/sim/simSeq.c
+++ b/src/opt/sim/simSeq.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -169,3 +172,5 @@ void Sim_SimulateSeqFrame( Vec_Ptr_t * vInfo, Abc_Ntk_t * pNtk, int iFrames, int
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSupp.c b/src/opt/sim/simSupp.c
index f84fedc4..563f98ac 100644
--- a/src/opt/sim/simSupp.c
+++ b/src/opt/sim/simSupp.c
@@ -22,12 +22,15 @@
#include "fraig.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-static int Sim_ComputeSuppRound( Sim_Man_t * p, bool fUseTargets );
-static int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, bool fUseTargets );
+static int Sim_ComputeSuppRound( Sim_Man_t * p, int fUseTargets );
+static int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, int fUseTargets );
static void Sim_ComputeSuppSetTargets( Sim_Man_t * p );
static void Sim_UtilAssignRandom( Sim_Man_t * p );
@@ -68,17 +71,17 @@ Vec_Ptr_t * Sim_ComputeStrSupp( Abc_Ntk_t * pNtk )
{
// if ( Abc_NodeIsConst(pNode) )
// continue;
- pSimmNode = vSuppStr->pArray[ pNode->Id ];
- pSimmNode1 = vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ];
- pSimmNode2 = vSuppStr->pArray[ Abc_ObjFaninId1(pNode) ];
+ pSimmNode = (unsigned *)vSuppStr->pArray[ pNode->Id ];
+ pSimmNode1 = (unsigned *)vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode2 = (unsigned *)vSuppStr->pArray[ Abc_ObjFaninId1(pNode) ];
for ( k = 0; k < nSuppWords; k++ )
pSimmNode[k] = pSimmNode1[k] | pSimmNode2[k];
}
// set the structural supports of the PO nodes
Abc_NtkForEachCo( pNtk, pNode, i )
{
- pSimmNode = vSuppStr->pArray[ pNode->Id ];
- pSimmNode1 = vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode = (unsigned *)vSuppStr->pArray[ pNode->Id ];
+ pSimmNode1 = (unsigned *)vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ];
for ( k = 0; k < nSuppWords; k++ )
pSimmNode[k] = pSimmNode1[k];
}
@@ -165,7 +168,7 @@ p->timeTotal = clock() - clk;
SeeAlso []
***********************************************************************/
-int Sim_ComputeSuppRound( Sim_Man_t * p, bool fUseTargets )
+int Sim_ComputeSuppRound( Sim_Man_t * p, int fUseTargets )
{
Vec_Int_t * vTargets;
int i, Counter = 0;
@@ -177,7 +180,7 @@ p->timeSim += clock() - clk;
// iterate through the CIs and detect COs that depend on them
for ( i = p->iInput; i < p->nInputs; i++ )
{
- vTargets = p->vSuppTargs->pArray[i];
+ vTargets = (Vec_Int_t *)p->vSuppTargs->pArray[i];
if ( fUseTargets && vTargets->nSize == 0 )
continue;
Counter += Sim_ComputeSuppRoundNode( p, i, fUseTargets );
@@ -196,7 +199,7 @@ p->timeSim += clock() - clk;
SeeAlso []
***********************************************************************/
-int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, bool fUseTargets )
+int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, int fUseTargets )
{
int fVerbose = 0;
Sim_Pat_t * pPat;
@@ -217,7 +220,7 @@ p->timeTrav += clock() - clk;
// complement the simulation info of the selected CI
Sim_UtilInfoFlip( p, pNodeCi );
// simulate the levelized structure of nodes
- Vec_VecForEachEntry( vNodesByLevel, pNode, i, k )
+ Vec_VecForEachEntry( Abc_Obj_t *, vNodesByLevel, pNode, i, k )
{
fType0 = Abc_NodeIsTravIdCurrent( Abc_ObjFanin0(pNode) );
fType1 = Abc_NodeIsTravIdCurrent( Abc_ObjFanin1(pNode) );
@@ -228,7 +231,7 @@ p->timeSim += clock() - clk;
// set the simulation info of the affected COs
if ( fUseTargets )
{
- vTargets = p->vSuppTargs->pArray[iNumCi];
+ vTargets = (Vec_Int_t *)p->vSuppTargs->pArray[iNumCi];
for ( i = vTargets->nSize - 1; i >= 0; i-- )
{
// get the target output
@@ -253,7 +256,7 @@ if ( fVerbose )
Sim_SuppFunSetVar( p->vSuppFun, Output, iNumCi );
// detect the differences in the simulation info
- Sim_UtilInfoDetectDiffs( p->vSim0->pArray[pNode->Id], p->vSim1->pArray[pNode->Id], p->nSimWords, p->vDiffs );
+ Sim_UtilInfoDetectDiffs( (unsigned *)p->vSim0->pArray[pNode->Id], (unsigned *)p->vSim1->pArray[pNode->Id], p->nSimWords, p->vDiffs );
// create new patterns
if ( !fFirst && p->vFifo->nSize > 1000 )
continue;
@@ -314,8 +317,8 @@ void Sim_ComputeSuppSetTargets( Sim_Man_t * p )
int i, k, Num;
Abc_NtkForEachCo( p->pNtk, pNode, i )
{
- pSuppStr = p->vSuppStr->pArray[pNode->Id];
- pSuppFun = p->vSuppFun->pArray[i];
+ pSuppStr = (unsigned *)p->vSuppStr->pArray[pNode->Id];
+ pSuppFun = (unsigned *)p->vSuppFun->pArray[i];
// find vars in the structural support that are not in the functional support
Sim_UtilInfoDetectNews( pSuppFun, pSuppStr, p->nSuppWords, p->vDiffs );
Vec_IntForEachEntry( p->vDiffs, Num, k )
@@ -342,7 +345,7 @@ void Sim_UtilAssignRandom( Sim_Man_t * p )
// assign the random/systematic simulation info to the PIs
Abc_NtkForEachCi( p->pNtk, pNode, i )
{
- pSimInfo = p->vSim0->pArray[pNode->Id];
+ pSimInfo = (unsigned *)p->vSim0->pArray[pNode->Id];
for ( k = 0; k < p->nSimWords; k++ )
pSimInfo[k] = SIM_RANDOM_UNSIGNED;
}
@@ -373,7 +376,7 @@ void Sim_UtilAssignFromFifo( Sim_Man_t * p )
{
++Counter;
// get the pattern
- pPat = Vec_PtrPop( p->vFifo );
+ pPat = (Sim_Pat_t *)Vec_PtrPop( p->vFifo );
if ( fUseOneWord )
{
// get the first word of the next series
@@ -385,7 +388,7 @@ void Sim_UtilAssignFromFifo( Sim_Man_t * p )
Abc_NtkForEachCi( p->pNtk, pNode, i )
{
pNode = Abc_NtkCi(p->pNtk,i);
- pSimInfo = p->vSim0->pArray[pNode->Id];
+ pSimInfo = (unsigned *)p->vSim0->pArray[pNode->Id];
if ( Sim_HasBit(pPat->pData, i) )
pSimInfo[iWord] = SIM_MASK_FULL;
else
@@ -405,7 +408,7 @@ void Sim_UtilAssignFromFifo( Sim_Man_t * p )
// set the pattern for all CIs from iWord to iWord + nWordsNew
Abc_NtkForEachCi( p->pNtk, pNode, i )
{
- pSimInfo = p->vSim0->pArray[pNode->Id];
+ pSimInfo = (unsigned *)p->vSim0->pArray[pNode->Id];
if ( Sim_HasBit(pPat->pData, i) )
{
for ( w = iWord; w < iWordLim; w++ )
@@ -457,7 +460,7 @@ void Sim_SolveTargetsUsingSat( Sim_Man_t * p, int Limit )
p->nSatRuns = 0;
// put targets into one array
- Vec_VecForEachEntryReverse( p->vSuppTargs, pEntry, Input, k )
+ Vec_VecForEachEntryReverse( void *, p->vSuppTargs, pEntry, Input, k )
{
p->nSatRuns++;
Output = (int)(ABC_PTRUINT_T)pEntry;
@@ -470,7 +473,7 @@ void Sim_SolveTargetsUsingSat( Sim_Man_t * p, int Limit )
Params.nSeconds = ABC_INFINITY;
Params.fInternal = 1;
clk = clock();
- pMan = Abc_NtkToFraig( pMiter, &Params, 0, 0 );
+ pMan = (Fraig_Man_t *)Abc_NtkToFraig( pMiter, &Params, 0, 0 );
p->timeFraig += clock() - clk;
clk = clock();
Fraig_ManProveMiter( pMan );
@@ -483,7 +486,7 @@ p->timeSat += clock() - clk;
{
p->nSatRunsUnsat++;
pModel = NULL;
- Vec_PtrRemove( p->vSuppTargs->pArray[Input], pEntry );
+ Vec_PtrRemove( (Vec_Ptr_t *)p->vSuppTargs->pArray[Input], pEntry );
}
else // sat
{
@@ -595,3 +598,5 @@ int Sim_SolveSuppModelVerify( Abc_Ntk_t * pNtk, int * pModel, int Input, int Out
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSwitch.c b/src/opt/sim/simSwitch.c
index baabc320..4f675082 100644
--- a/src/opt/sim/simSwitch.c
+++ b/src/opt/sim/simSwitch.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -64,15 +67,15 @@ Vec_Int_t * Sim_NtkComputeSwitching( Abc_Ntk_t * pNtk, int nPatterns )
pSwitching = (float *)vSwitching->pArray;
Abc_NtkForEachCi( pNtk, pNode, i )
{
- pSimInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
+ pSimInfo = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
Sim_UtilSetRandom( pSimInfo, nSimWords );
pSwitching[pNode->Id] = Sim_ComputeSwitching( pSimInfo, nSimWords );
}
// simulate the internal nodes
vNodes = Abc_AigDfs( pNtk, 1, 0 );
- Vec_PtrForEachEntry( vNodes, pNode, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i )
{
- pSimInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
+ pSimInfo = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
Sim_UtilSimulateNodeOne( pNode, vSimInfo, nSimWords, 0 );
pSwitching[pNode->Id] = Sim_ComputeSwitching( pSimInfo, nSimWords );
}
@@ -105,3 +108,5 @@ float Sim_ComputeSwitching( unsigned * pSimInfo, int nSimWords )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSym.c b/src/opt/sim/simSym.c
index 71de5b05..d8a1eb4f 100644
--- a/src/opt/sim/simSym.c
+++ b/src/opt/sim/simSym.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -140,3 +143,5 @@ p->timeTotal = clock() - clkTotal;
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSymSat.c b/src/opt/sim/simSymSat.c
index 7690a891..4f6690e5 100644
--- a/src/opt/sim/simSymSat.c
+++ b/src/opt/sim/simSymSat.c
@@ -22,6 +22,9 @@
#include "sim.h"
#include "fraig.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -55,11 +58,11 @@ int Sim_SymmsGetPatternUsingSat( Sym_Man_t * p, unsigned * pPattern )
// iterate through outputs
for ( out = p->iOutput; out < p->nOutputs; out++ )
{
- pMatSym = Vec_PtrEntry( p->vMatrSymms, out );
- pMatNonSym = Vec_PtrEntry( p->vMatrNonSymms, out );
+ pMatSym = (Extra_BitMat_t *)Vec_PtrEntry( p->vMatrSymms, out );
+ pMatNonSym = (Extra_BitMat_t *)Vec_PtrEntry( p->vMatrNonSymms, out );
// go through the remaining variable pairs
- vSupport = Vec_VecEntry( p->vSupports, out );
+ vSupport = (Vec_Int_t *)Vec_VecEntry( p->vSupports, out );
Vec_IntForEachEntry( vSupport, v, Index1 )
Vec_IntForEachEntryStart( vSupport, u, Index2, Index1+1 )
{
@@ -147,7 +150,7 @@ int Sim_SymmsSatProveOne( Sym_Man_t * p, int Out, int Var1, int Var2, unsigned *
Params.nSeconds = ABC_INFINITY;
clk = clock();
- pMan = Abc_NtkToFraig( pMiter, &Params, 0, 0 );
+ pMan = (Fraig_Man_t *)Abc_NtkToFraig( pMiter, &Params, 0, 0 );
p->timeFraig += clock() - clk;
clk = clock();
Fraig_ManProveMiter( pMan );
@@ -197,3 +200,5 @@ p->timeSat += clock() - clk;
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSymSim.c b/src/opt/sim/simSymSim.c
index 2282825b..85ba56fb 100644
--- a/src/opt/sim/simSymSim.c
+++ b/src/opt/sim/simSymSim.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -53,7 +56,7 @@ void Sim_SymmsSimulate( Sym_Man_t * p, unsigned * pPat, Vec_Ptr_t * vMatrsNonSym
Sim_SymmsCreateSquare( p, pPat );
// simulate each node in the DFS order
clk = clock();
- Vec_PtrForEachEntry( p->vNodes, pNode, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pNode, i )
{
// if ( Abc_NodeIsConst(pNode) )
// continue;
@@ -97,7 +100,7 @@ void Sim_SymmsCreateSquare( Sym_Man_t * p, unsigned * pPat )
// for each PI var copy the pattern
Abc_NtkForEachCi( p->pNtk, pNode, i )
{
- pSimInfo = Vec_PtrEntry( p->vSim, pNode->Id );
+ pSimInfo = (unsigned *)Vec_PtrEntry( p->vSim, pNode->Id );
if ( Sim_HasBit(pPat, i) )
{
for ( w = 0; w < p->nSimWords; w++ )
@@ -132,10 +135,10 @@ void Sim_SymmsDeriveInfo( Sym_Man_t * p, unsigned * pPat, Abc_Obj_t * pNode, Vec
unsigned * pSimInfo;
int i, w, Index;
// get the matrix, the support, and the simulation info
- pMat = Vec_PtrEntry( vMatrsNonSym, Output );
- vSupport = Vec_VecEntry( p->vSupports, Output );
- pSupport = Vec_PtrEntry( p->vSuppFun, Output );
- pSimInfo = Vec_PtrEntry( p->vSim, pNode->Id );
+ pMat = (Extra_BitMat_t *)Vec_PtrEntry( vMatrsNonSym, Output );
+ vSupport = (Vec_Int_t *)Vec_VecEntry( p->vSupports, Output );
+ pSupport = (unsigned *)Vec_PtrEntry( p->vSuppFun, Output );
+ pSimInfo = (unsigned *)Vec_PtrEntry( p->vSim, pNode->Id );
// generate vectors A1 and A2
for ( w = 0; w < p->nSimWords; w++ )
{
@@ -171,3 +174,5 @@ void Sim_SymmsDeriveInfo( Sym_Man_t * p, unsigned * pPat, Abc_Obj_t * pNode, Vec
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simSymStr.c b/src/opt/sim/simSymStr.c
index 9ff2f590..e9a25905 100644
--- a/src/opt/sim/simSymStr.c
+++ b/src/opt/sim/simSymStr.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -72,7 +75,7 @@ void Sim_SymmsStructCompute( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMatrs, Vec_Ptr_t * v
pMap = Sim_SymmsCreateMap( pNtk );
// collect the nodes in the TFI cone of this output
vNodes = Abc_NtkDfs( pNtk, 0 );
- Vec_PtrForEachEntry( vNodes, pTemp, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pTemp, i )
{
// if ( Abc_NodeIsConst(pTemp) )
// continue;
@@ -85,14 +88,14 @@ void Sim_SymmsStructCompute( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMatrs, Vec_Ptr_t * v
pTemp = Abc_ObjFanin0(pTemp);
if ( Abc_ObjIsCi(pTemp) || Abc_AigNodeIsConst(pTemp) )
continue;
- Sim_SymmsTransferToMatrix( Vec_PtrEntry(vMatrs, i), SIM_READ_SYMMS(pTemp), Vec_PtrEntry(vSuppFun, i) );
+ Sim_SymmsTransferToMatrix( (Extra_BitMat_t *)Vec_PtrEntry(vMatrs, i), SIM_READ_SYMMS(pTemp), (unsigned *)Vec_PtrEntry(vSuppFun, i) );
}
// clean the intermediate results
Sim_UtilInfoFree( pNtk->vSupps );
pNtk->vSupps = NULL;
Abc_NtkForEachCi( pNtk, pTemp, i )
Vec_IntFree( SIM_READ_SYMMS(pTemp) );
- Vec_PtrForEachEntry( vNodes, pTemp, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pTemp, i )
// if ( !Abc_NodeIsConst(pTemp) )
Vec_IntFree( SIM_READ_SYMMS(pTemp) );
Vec_PtrFree( vNodes );
@@ -137,7 +140,7 @@ void Sim_SymmsStructComputeOne( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int * pMap
// add symmetries from other inputs
for ( i = 0; i < vNodesOther->nSize; i++ )
{
- pTemp = Abc_ObjRegular(vNodesOther->pArray[i]);
+ pTemp = Abc_ObjRegular((Abc_Obj_t *)vNodesOther->pArray[i]);
Sim_SymmsAppendFromNode( pNtk, SIM_READ_SYMMS(pTemp), vNodesOther, vNodesPi0, vNodesPi1, vSymms, pMap );
}
Vec_PtrFree( vNodes );
@@ -196,7 +199,7 @@ void Sim_SymmsPartitionNodes( Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesPis0,
{
Abc_Obj_t * pNode;
int i;
- Vec_PtrForEachEntry( vNodes, pNode, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i )
{
if ( !Abc_ObjIsCi(Abc_ObjRegular(pNode)) )
Vec_PtrPush( vNodesOther, pNode );
@@ -232,8 +235,8 @@ void Sim_SymmsAppendFromGroup( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodesPi, Vec_Ptr_t
for ( k = i+1; k < vNodesPi->nSize; k++ )
{
// get the two PI nodes
- pNode1 = Abc_ObjRegular(vNodesPi->pArray[i]);
- pNode2 = Abc_ObjRegular(vNodesPi->pArray[k]);
+ pNode1 = Abc_ObjRegular((Abc_Obj_t *)vNodesPi->pArray[i]);
+ pNode2 = Abc_ObjRegular((Abc_Obj_t *)vNodesPi->pArray[k]);
assert( pMap[pNode1->Id] != pMap[pNode2->Id] );
assert( pMap[pNode1->Id] >= 0 );
assert( pMap[pNode2->Id] >= 0 );
@@ -310,7 +313,7 @@ int Sim_SymmsIsCompatibleWithNodes( Abc_Ntk_t * pNtk, unsigned uSymm, Vec_Ptr_t
// if they belong, but are not part of symmetry, quit
for ( i = 0; i < vNodesOther->nSize; i++ )
{
- pNode = Abc_ObjRegular(vNodesOther->pArray[i]);
+ pNode = Abc_ObjRegular((Abc_Obj_t *)vNodesOther->pArray[i]);
fIsVar1 = Sim_SuppStrHasVar( pNtk->vSupps, pNode, Ind1 );
fIsVar2 = Sim_SuppStrHasVar( pNtk->vSupps, pNode, Ind2 );
@@ -357,7 +360,7 @@ int Sim_SymmsIsCompatibleWithGroup( unsigned uSymm, Vec_Ptr_t * vNodesPi, int *
fHasVar1 = fHasVar2 = 0;
for ( i = 0; i < vNodesPi->nSize; i++ )
{
- pNode = Abc_ObjRegular(vNodesPi->pArray[i]);
+ pNode = Abc_ObjRegular((Abc_Obj_t *)vNodesPi->pArray[i]);
if ( pMap[pNode->Id] == Ind1 )
fHasVar1 = 1;
else if ( pMap[pNode->Id] == Ind2 )
@@ -486,3 +489,5 @@ int * Sim_SymmsCreateMap( Abc_Ntk_t * pNtk )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/sim/simUtils.c b/src/opt/sim/simUtils.c
index dba487d8..25d4cd44 100644
--- a/src/opt/sim/simUtils.c
+++ b/src/opt/sim/simUtils.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "sim.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -51,7 +54,7 @@ static int bit_count[256] = {
SeeAlso []
***********************************************************************/
-Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, bool fClean )
+Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, int fClean )
{
Vec_Ptr_t * vInfo;
int i;
@@ -162,8 +165,8 @@ void Sim_UtilInfoFlip( Sim_Man_t * p, Abc_Obj_t * pNode )
{
unsigned * pSimInfo1, * pSimInfo2;
int k;
- pSimInfo1 = p->vSim0->pArray[pNode->Id];
- pSimInfo2 = p->vSim1->pArray[pNode->Id];
+ pSimInfo1 = (unsigned *)p->vSim0->pArray[pNode->Id];
+ pSimInfo2 = (unsigned *)p->vSim1->pArray[pNode->Id];
for ( k = 0; k < p->nSimWords; k++ )
pSimInfo2[k] = ~pSimInfo1[k];
}
@@ -179,12 +182,12 @@ void Sim_UtilInfoFlip( Sim_Man_t * p, Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
-bool Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode )
+int Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode )
{
unsigned * pSimInfo1, * pSimInfo2;
int k;
- pSimInfo1 = p->vSim0->pArray[pNode->Id];
- pSimInfo2 = p->vSim1->pArray[pNode->Id];
+ pSimInfo1 = (unsigned *)p->vSim0->pArray[pNode->Id];
+ pSimInfo2 = (unsigned *)p->vSim1->pArray[pNode->Id];
for ( k = 0; k < p->nSimWords; k++ )
if ( pSimInfo2[k] != pSimInfo1[k] )
return 0;
@@ -202,7 +205,7 @@ bool Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
-void Sim_UtilSimulate( Sim_Man_t * p, bool fType )
+void Sim_UtilSimulate( Sim_Man_t * p, int fType )
{
Abc_Obj_t * pNode;
int i;
@@ -225,7 +228,7 @@ void Sim_UtilSimulate( Sim_Man_t * p, bool fType )
SeeAlso []
***********************************************************************/
-void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fType1, bool fType2 )
+void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, int fType, int fType1, int fType2 )
{
unsigned * pSimmNode, * pSimmNode1, * pSimmNode2;
int k, fComp1, fComp2;
@@ -233,19 +236,19 @@ void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fT
if ( Abc_ObjIsNode(pNode) )
{
if ( fType )
- pSimmNode = p->vSim1->pArray[ pNode->Id ];
+ pSimmNode = (unsigned *)p->vSim1->pArray[ pNode->Id ];
else
- pSimmNode = p->vSim0->pArray[ pNode->Id ];
+ pSimmNode = (unsigned *)p->vSim0->pArray[ pNode->Id ];
if ( fType1 )
- pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode1 = (unsigned *)p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
else
- pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode1 = (unsigned *)p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
if ( fType2 )
- pSimmNode2 = p->vSim1->pArray[ Abc_ObjFaninId1(pNode) ];
+ pSimmNode2 = (unsigned *)p->vSim1->pArray[ Abc_ObjFaninId1(pNode) ];
else
- pSimmNode2 = p->vSim0->pArray[ Abc_ObjFaninId1(pNode) ];
+ pSimmNode2 = (unsigned *)p->vSim0->pArray[ Abc_ObjFaninId1(pNode) ];
fComp1 = Abc_ObjFaninC0(pNode);
fComp2 = Abc_ObjFaninC1(pNode);
@@ -266,14 +269,14 @@ void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fT
{
assert( Abc_ObjFaninNum(pNode) == 1 );
if ( fType )
- pSimmNode = p->vSim1->pArray[ pNode->Id ];
+ pSimmNode = (unsigned *)p->vSim1->pArray[ pNode->Id ];
else
- pSimmNode = p->vSim0->pArray[ pNode->Id ];
+ pSimmNode = (unsigned *)p->vSim0->pArray[ pNode->Id ];
if ( fType1 )
- pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode1 = (unsigned *)p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
else
- pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
+ pSimmNode1 = (unsigned *)p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
fComp1 = Abc_ObjFaninC0(pNode);
if ( fComp1 )
@@ -302,9 +305,9 @@ void Sim_UtilSimulateNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimW
int k, fComp1, fComp2;
// simulate the internal nodes
assert( Abc_ObjIsNode(pNode) );
- pSimmNode = Vec_PtrEntry(vSimInfo, pNode->Id);
- pSimmNode1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
- pSimmNode2 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
+ pSimmNode = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
+ pSimmNode1 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
+ pSimmNode2 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
pSimmNode += nOffset;
pSimmNode1 += nOffset;
pSimmNode2 += nOffset;
@@ -341,8 +344,8 @@ void Sim_UtilTransferNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimW
int k, fComp1;
// simulate the internal nodes
assert( Abc_ObjIsCo(pNode) );
- pSimmNode = Vec_PtrEntry(vSimInfo, pNode->Id);
- pSimmNode1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
+ pSimmNode = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
+ pSimmNode1 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
pSimmNode += nOffset + (fShift > 0)*nSimWords;
pSimmNode1 += nOffset;
fComp1 = Abc_ObjFaninC0(pNode);
@@ -425,7 +428,7 @@ Vec_Int_t * Sim_UtilCountOnesArray( Vec_Ptr_t * vInfo, int nSimWords )
unsigned * pSimInfo;
int i;
vCounters = Vec_IntStart( Vec_PtrSize(vInfo) );
- Vec_PtrForEachEntry( vInfo, pSimInfo, i )
+ Vec_PtrForEachEntry( unsigned *, vInfo, pSimInfo, i )
Vec_IntWriteEntry( vCounters, i, Sim_UtilCountOnes(pSimInfo, nSimWords) );
return vCounters;
}
@@ -562,7 +565,7 @@ int Sim_UtilCountAllPairs( Vec_Ptr_t * vSuppFun, int nSimWords, Vec_Int_t * vCou
unsigned * pSupp;
int Counter, nOnes, nPairs, i;
Counter = 0;
- Vec_PtrForEachEntry( vSuppFun, pSupp, i )
+ Vec_PtrForEachEntry( unsigned *, vSuppFun, pSupp, i )
{
nOnes = Sim_UtilCountOnes( pSupp, nSimWords );
nPairs = nOnes * (nOnes - 1) / 2;
@@ -635,7 +638,7 @@ clk = clock();
for ( i = 0; i < p->nOutputs; i++ )
{
printf( "Output %2d :", i );
- Sim_UtilCountPairsOnePrint( Vec_PtrEntry(p->vMatrSymms, i), Vec_VecEntry(p->vSupports, i) );
+ Sim_UtilCountPairsOnePrint( (Extra_BitMat_t *)Vec_PtrEntry(p->vMatrSymms, i), (Vec_Int_t *)Vec_VecEntry(p->vSupports, i) );
printf( "\n" );
}
p->timeCount += clock() - clk;
@@ -670,8 +673,8 @@ clk = clock();
p->nPairsNonSymm += nPairsNonSym;
continue;
}
- nPairsSym = Sim_UtilCountPairsOne( Vec_PtrEntry(p->vMatrSymms, i), Vec_VecEntry(p->vSupports, i) );
- nPairsNonSym = Sim_UtilCountPairsOne( Vec_PtrEntry(p->vMatrNonSymms,i), Vec_VecEntry(p->vSupports, i) );
+ nPairsSym = Sim_UtilCountPairsOne( (Extra_BitMat_t *)Vec_PtrEntry(p->vMatrSymms, i), (Vec_Int_t *)Vec_VecEntry(p->vSupports, i) );
+ nPairsNonSym = Sim_UtilCountPairsOne( (Extra_BitMat_t *)Vec_PtrEntry(p->vMatrNonSymms,i), (Vec_Int_t *)Vec_VecEntry(p->vSupports, i) );
assert( nPairsTotal >= nPairsSym + nPairsNonSym );
Vec_IntWriteEntry( p->vPairsSym, i, nPairsSym );
Vec_IntWriteEntry( p->vPairsNonSym, i, nPairsNonSym );
@@ -699,7 +702,7 @@ int Sim_UtilMatrsAreDisjoint( Sym_Man_t * p )
{
int i;
for ( i = 0; i < p->nOutputs; i++ )
- if ( !Extra_BitMatrixIsDisjoint( Vec_PtrEntry(p->vMatrSymms,i), Vec_PtrEntry(p->vMatrNonSymms,i) ) )
+ if ( !Extra_BitMatrixIsDisjoint( (Extra_BitMat_t *)Vec_PtrEntry(p->vMatrSymms,i), (Extra_BitMat_t *)Vec_PtrEntry(p->vMatrNonSymms,i) ) )
return 0;
return 1;
}
@@ -709,3 +712,5 @@ int Sim_UtilMatrsAreDisjoint( Sym_Man_t * p )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 05:24:33 +0000