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-rw-r--r--src/base/abc/abcNtk.c1
-rw-r--r--src/base/abci/abc.c14
-rw-r--r--src/base/abci/abcFpgaFast.c79
-rw-r--r--src/base/abci/abcIvy.c2
-rw-r--r--src/base/abci/abcPrint.c13
-rw-r--r--src/base/abci/abcTiming.c2
6 files changed, 98 insertions, 13 deletions
diff --git a/src/base/abc/abcNtk.c b/src/base/abc/abcNtk.c
index d7283d55..215e80ec 100644
--- a/src/base/abc/abcNtk.c
+++ b/src/base/abc/abcNtk.c
@@ -705,6 +705,7 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
Vec_PtrFree( pNtk->vCutSet );
Vec_PtrFree( pNtk->vBoxes );
Vec_FltFree( pNtk->vSkews );
+ if ( pNtk->vLevelsR ) Vec_IntFree( pNtk->vLevelsR );
if ( pNtk->pModel ) free( pNtk->pModel );
TotalMemory = 0;
TotalMemory += pNtk->pMmObj? Extra_MmFixedReadMemUsage(pNtk->pMmObj) : 0;
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index 0f20e4d8..4154fe53 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -4736,11 +4736,11 @@ int Abc_CommandXyz( Abc_Frame_t * pAbc, int argc, char ** argv )
pErr = Abc_FrameReadErr(pAbc);
// set defaults
- nLutMax = 8;
+ nLutMax = 6;
nPlaMax = 128;
RankCost = 96000;
fFastMode = 1;
- fRewriting = 1;
+ fRewriting = 0;
fSynthesis = 0;
fVerbose = 1;
Extra_UtilGetoptReset();
@@ -4811,7 +4811,7 @@ int Abc_CommandXyz( Abc_Frame_t * pAbc, int argc, char ** argv )
return 1;
}
- if ( nLutMax < 2 || nLutMax > 8 || nPlaMax < 8 || nPlaMax > 128 )
+ if ( nLutMax < 2 || nLutMax > 12 || nPlaMax < 8 || nPlaMax > 128 )
{
fprintf( pErr, "Incorrect LUT/PLA parameters.\n" );
return 1;
@@ -4819,8 +4819,8 @@ int Abc_CommandXyz( Abc_Frame_t * pAbc, int argc, char ** argv )
// run the command
// pNtkRes = Abc_NtkXyz( pNtk, nPlaMax, 1, 0, fInvs, fVerbose );
-// pNtkRes = Abc_NtkPlayer( pNtk, nLutMax, nPlaMax, RankCost, fFastMode, fRewriting, fSynthesis, fVerbose );
- pNtkRes = NULL;
+ pNtkRes = Abc_NtkPlayer( pNtk, nLutMax, nPlaMax, RankCost, fFastMode, fRewriting, fSynthesis, fVerbose );
+// pNtkRes = NULL;
if ( pNtkRes == NULL )
{
fprintf( pErr, "Command has failed.\n" );
@@ -6495,7 +6495,7 @@ int Abc_CommandFpga( Abc_Frame_t * pAbc, int argc, char ** argv )
}
// create the new LUT library
- if ( nLutSize >= 3 && nLutSize <= 6 )
+ if ( nLutSize >= 3 && nLutSize <= 10 )
Fpga_SetSimpleLutLib( nLutSize );
/*
else
@@ -6560,7 +6560,7 @@ usage:
fprintf( pErr, "\t-p : optimizes power by minimizing switching activity [default = %s]\n", fSwitching? "yes": "no" );
fprintf( pErr, "\t-l : optimizes latch paths for delay, other paths for area [default = %s]\n", fLatchPaths? "yes": "no" );
fprintf( pErr, "\t-D float : sets the required time for the mapping [default = %s]\n", Buffer );
- fprintf( pErr, "\t-K num : the number of LUT inputs [default = %s]%s\n", LutSize, (nLutSize == -1 ? " (type \"print_lut\")" : "") );
+ fprintf( pErr, "\t-K num : the number of LUT inputs (2 < num < 11) [default = %s]%s\n", LutSize, (nLutSize == -1 ? " (type \"print_lut\")" : "") );
fprintf( pErr, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" );
fprintf( pErr, "\t-h : prints the command usage\n");
return 1;
diff --git a/src/base/abci/abcFpgaFast.c b/src/base/abci/abcFpgaFast.c
new file mode 100644
index 00000000..2d5813c7
--- /dev/null
+++ b/src/base/abci/abcFpgaFast.c
@@ -0,0 +1,79 @@
+/**CFile****************************************************************
+
+ FileName [abcFpgaFast.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Network and node package.]
+
+ Synopsis [Fast FPGA mapper.]
+
+ Author [Sungmin Cho]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: abcFpgaFast.c,v 1.00 2006/09/02 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "abc.h"
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Performs fast FPGA mapping of the network.]
+
+ Description [Takes the AIG to be mapped, the LUT size, and verbosity
+ flag. Produces the new network by fast FPGA mapping of the current
+ network. If the current network in ABC in not an AIG, the user should
+ run command "strash" to make sure that the current network into an AIG
+ before calling this procedure.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkFpgaFast( Abc_Ntk_t * pNtk, int nLutSize, int fVerbose )
+{
+ Abc_Ntk_t * pNtkNew;
+ Abc_Obj_t * pObj;
+ int i;
+
+ // make sure the network is an AIG
+ assert( Abc_NtkIsStrash(pNtk) );
+
+ // iterate over the nodes in the network
+ Abc_NtkForEachNode( pNtk, pObj, i )
+ {
+ }
+
+ // create the new network after mapping
+ pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
+
+ // here we need to create nodes of the new network
+
+ // make sure that the final network passes the test
+ if ( pNtkNew != NULL && !Abc_NtkCheck( pNtkNew ) )
+ {
+ printf( "Abc_NtkFastMap: The network check has failed.\n" );
+ Abc_NtkDelete( pNtkNew );
+ return NULL;
+ }
+ return pNtkNew;
+}
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
diff --git a/src/base/abci/abcIvy.c b/src/base/abci/abcIvy.c
index dae5408d..9793a4e2 100644
--- a/src/base/abci/abcIvy.c
+++ b/src/base/abci/abcIvy.c
@@ -383,7 +383,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
// Ivy_ManRequiredLevels( pMan );
-// Pla_ManFastLutMap( pMan, 8 );
+// Ivy_FastMapPerform( pMan, 8 );
Ivy_ManStop( pMan );
return NULL;
diff --git a/src/base/abci/abcPrint.c b/src/base/abci/abcPrint.c
index 81059a0f..c7e2acc0 100644
--- a/src/base/abci/abcPrint.c
+++ b/src/base/abci/abcPrint.c
@@ -31,6 +31,9 @@
//extern int s_TotalNodes = 0;
//extern int s_TotalChanges = 0;
+int s_MappingTime = 0;
+int s_MappingMem = 0;
+
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@@ -141,18 +144,20 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
}
*/
-/*
+
// print the statistic into a file
{
FILE * pTable;
- pTable = fopen( "fpga_stats.txt", "a+" );
+ pTable = fopen( "fpga/fpga_stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
+ fprintf( pTable, "%d ", Abc_NtkGetLevelNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
- fprintf( pTable, "%d ", Abc_AigGetLevelNum(pNtk) );
+ fprintf( pTable, "%.2f ", (float)(s_MappingMem)/(float)(1<<20) );
+ fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
}
-*/
+
/*
// print the statistic into a file
diff --git a/src/base/abci/abcTiming.c b/src/base/abci/abcTiming.c
index 8364b783..af06436f 100644
--- a/src/base/abci/abcTiming.c
+++ b/src/base/abci/abcTiming.c
@@ -646,7 +646,7 @@ void Abc_NtkStartReverseLevels( Abc_Ntk_t * pNtk )
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pFanout;
int i, k, nLevelsCur;
- assert( Abc_NtkIsStrash(pNtk) );
+// assert( Abc_NtkIsStrash(pNtk) );
// remember the maximum number of direct levels
// pNtk->LevelMax = Abc_AigGetLevelNum(pNtk);
pNtk->LevelMax = Abc_NtkGetLevelNum(pNtk);
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-09 21:13:25 +0000