diff options
Diffstat (limited to 'src/base/acb/acbFunc.c')
| -rw-r--r-- | src/base/acb/acbFunc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/base/acb/acbFunc.c b/src/base/acb/acbFunc.c index 3f5a27fb..8f72a00f 100644 --- a/src/base/acb/acbFunc.c +++ b/src/base/acb/acbFunc.c @@ -260,7 +260,7 @@ void * Acb_VerilogSimpleParse( Vec_Int_t * vBuffer, Abc_Nam_t * pNames ) Vec_IntPush( vTypes, -1 ); Vec_IntPush( vTypes, Vec_IntSize(vFanins) ); // create design - pDesign = Ndr_Create( Vec_IntEntry(vBuffer, 1) ); + pDesign = (Ndr_Data_t *)Ndr_Create( Vec_IntEntry(vBuffer, 1) ); ModuleID = Ndr_AddModule( pDesign, Vec_IntEntry(vBuffer, 1) ); // create inputs Ndr_DataResize( pDesign, Vec_IntSize(vInputs) ); @@ -2681,7 +2681,7 @@ int Acb_NtkEcoPerform( Acb_Ntk_t * pNtkF, Acb_Ntk_t * pNtkG, char * pFileName[4] // generate output files if ( pFileName[3] == NULL ) Acb_GenerateFilePatch( vPatch, "patch.v" ); - Acb_GenerateFileOut( vInst, pFileName[0], pFileName[3] ? pFileName[3] : "out.v", vPatch ); + Acb_GenerateFileOut( vInst, pFileName[0], pFileName[3] ? pFileName[3] : (char *)"out.v", vPatch ); printf( "Finished dumping resulting file \"%s\".\n\n", pFileName[3] ? pFileName[3] : "out.v" ); //Gia_AigerWrite( pGiaG, "test.aig", 0, 0, 0 ); cleanup: |