diff options
Diffstat (limited to 'src/base/abci/abcFpga.c')
| -rw-r--r-- | src/base/abci/abcFpga.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/base/abci/abcFpga.c b/src/base/abci/abcFpga.c index b87edb6b..0c45c7d2 100644 --- a/src/base/abci/abcFpga.c +++ b/src/base/abci/abcFpga.c @@ -21,6 +21,9 @@ #include "abc.h" #include "fpgaInt.h" +ABC_NAMESPACE_IMPL_START + + //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// @@ -57,7 +60,7 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, float DelayTarget, int fRecovery, int // print a warning about choice nodes if ( (Num = Abc_NtkGetChoiceNum( pNtk )) ) - printf( "Performing LUT mapping with %d choices.\n", Num ); + Abc_Print( 0, "Performing LUT mapping with %d choices.\n", Num ); // compute switching activity fShowSwitching |= fSwitching; @@ -156,7 +159,7 @@ Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching, // load the AIG into the mapper vNodes = Abc_AigDfs( pNtk, 0, 0 ); pProgress = Extra_ProgressBarStart( stdout, vNodes->nSize ); - Vec_PtrForEachEntry( vNodes, pNode, i ) + Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i ) { Extra_ProgressBarUpdate( pProgress, i, NULL ); // add the node to the mapper @@ -170,7 +173,7 @@ Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching, Fpga_NodeSetSwitching( pNodeFpga, pSwitching[pNode->Id] ); // set up the choice node if ( Abc_AigNodeIsChoice( pNode ) ) - for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData ) + for ( pPrev = pNode, pFanin = (Abc_Obj_t *)pNode->pData; pFanin; pPrev = pFanin, pFanin = (Abc_Obj_t *)pFanin->pData ) { Fpga_NodeSetNextE( (Fpga_Node_t *)pPrev->pCopy, (Fpga_Node_t *)pFanin->pCopy ); Fpga_NodeSetRepr( (Fpga_Node_t *)pFanin->pCopy, (Fpga_Node_t *)pNode->pCopy ); @@ -267,7 +270,7 @@ Abc_Obj_t * Abc_NodeFromFpga_rec( Abc_Ntk_t * pNtkNew, Fpga_Node_t * pNodeFpga ) for ( i = 0; i < nLeaves; i++ ) Abc_ObjAddFanin( pNodeNew, Abc_NodeFromFpga_rec(pNtkNew, ppLeaves[i]) ); // derive the function of this node - pNodeNew->pData = Fpga_TruthsCutBdd( pNtkNew->pManFunc, pCutBest ); Cudd_Ref( pNodeNew->pData ); + pNodeNew->pData = Fpga_TruthsCutBdd( pNtkNew->pManFunc, pCutBest ); Cudd_Ref( (DdNode *)pNodeNew->pData ); Fpga_NodeSetData0( pNodeFpga, (char *)pNodeNew ); return pNodeNew; } @@ -277,3 +280,5 @@ Abc_Obj_t * Abc_NodeFromFpga_rec( Abc_Ntk_t * pNtkNew, Fpga_Node_t * pNodeFpga ) //////////////////////////////////////////////////////////////////////// +ABC_NAMESPACE_IMPL_END + |