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authorAlan Mishchenko <alanmi@berkeley.edu>2015-02-04 16:29:55 -0800
committerAlan Mishchenko <alanmi@berkeley.edu>2015-02-04 16:29:55 -0800
commit8410daf3e49f142dc94587d77680d7cdcfe06b5a (patch)
tree1421944373a2581eaef995c392efe2dfd712affb /src/map
parenteb270018b92d949953cba3017ae6a540260598c1 (diff)
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Improvements and tuning of CBA with buffering/sizing.
Diffstat (limited to 'src/map')
-rw-r--r--src/map/scl/sclBufSize.c27
-rw-r--r--src/map/scl/sclDnsize.c25
-rw-r--r--src/map/scl/sclSize.c23
-rw-r--r--src/map/scl/sclSize.h6
-rw-r--r--src/map/scl/sclUtil.c24
5 files changed, 77 insertions, 28 deletions
diff --git a/src/map/scl/sclBufSize.c b/src/map/scl/sclBufSize.c
index 96b00af1..7707704d 100644
--- a/src/map/scl/sclBufSize.c
+++ b/src/map/scl/sclBufSize.c
@@ -172,8 +172,6 @@ static inline float Abc_NtkComputeEdgeDept( Abc_Obj_t * pFanout, int iFanin, flo
float Load = Bus_SclObjLoad( pFanout );
float Dept = Bus_SclObjDept( pFanout );
float Edge = Scl_LibPinArrivalEstimate( Abc_SclObjCell(pFanout), iFanin, Slew, Load );
-//if ( Abc_ObjFaninNum(pFanout) == 0 )
-//printf( "Edge = %.2f\n", Edge );
assert( Edge > 0 );
return Dept + Edge;
}
@@ -183,8 +181,12 @@ float Abc_NtkComputeNodeDeparture( Abc_Obj_t * pObj, float Slew )
int i;
assert( Bus_SclObjDept(pObj) == 0 );
Abc_ObjForEachFanout( pObj, pFanout, i )
- if ( !Abc_ObjIsCo(pFanout) ) // add required times here
+ {
+ if ( Abc_ObjIsBarBuf(pFanout) )
+ Bus_SclObjUpdateDept( pObj, Bus_SclObjDept(pFanout) );
+ else if ( !Abc_ObjIsCo(pFanout) ) // add required times here
Bus_SclObjUpdateDept( pObj, Abc_NtkComputeEdgeDept(pFanout, Abc_NodeFindFanin(pFanout, pObj), Slew) );
+ }
return Bus_SclObjDept( pObj );
}
void Abc_NtkComputeFanoutInfo( Abc_Obj_t * pObj, float Slew )
@@ -192,12 +194,19 @@ void Abc_NtkComputeFanoutInfo( Abc_Obj_t * pObj, float Slew )
Abc_Obj_t * pFanout;
int i;
Abc_ObjForEachFanout( pObj, pFanout, i )
- if ( !Abc_ObjIsCo(pFanout) )
+ {
+ if ( Abc_ObjIsBarBuf(pFanout) )
+ {
+ Bus_SclObjSetETime( pFanout, Bus_SclObjDept(pFanout) );
+ Bus_SclObjSetCin( pFanout, Bus_SclObjLoad(pFanout) );
+ }
+ else if ( !Abc_ObjIsCo(pFanout) )
{
int iFanin = Abc_NodeFindFanin(pFanout, pObj);
Bus_SclObjSetETime( pFanout, Abc_NtkComputeEdgeDept(pFanout, iFanin, Slew) );
Bus_SclObjSetCin( pFanout, SC_CellPinCap( Abc_SclObjCell(pFanout), iFanin ) );
}
+ }
}
float Abc_NtkComputeNodeLoad( Bus_Man_t * p, Abc_Obj_t * pObj )
{
@@ -407,10 +416,12 @@ void Abc_SclBufSize( Bus_Man_t * p, float Gain )
Abc_NtkComputeFanoutInfo( pObj, p->pPars->Slew );
Load = Abc_NtkComputeNodeLoad( p, pObj );
// consider the gate
- if ( Abc_ObjIsCi(pObj) )
+ if ( Abc_ObjIsCi(pObj) || Abc_ObjIsBarBuf(pObj) )
{
pCell = p->pPiDrive;
- Cin = SC_CellPinCapAve( pCell );
+ // if PI driver is not given, assume Cin to be equal to Load
+ // this way, buffering of the PIs is performed
+ Cin = pCell ? SC_CellPinCapAve(pCell) : Load;
}
else
{
@@ -418,7 +429,7 @@ void Abc_SclBufSize( Bus_Man_t * p, float Gain )
Cin = SC_CellPinCapAve( pCell->pAve );
// Cin = SC_CellPinCapAve( pCell->pRepr->pNext );
}
- // consider upsizing the gate
+ // consider buffering this gate
if ( !p->pPars->fSizeOnly && (Abc_ObjFanoutNum(pObj) > p->pPars->nDegree || Load > GainGate * Cin) )
{
// add one or more inverters
@@ -448,6 +459,8 @@ void Abc_SclBufSize( Bus_Man_t * p, float Gain )
if ( Abc_ObjIsCi(pObj) )
continue;
Abc_NtkComputeNodeDeparture( pObj, p->pPars->Slew );
+ if ( Abc_ObjIsBarBuf(pObj) )
+ continue;
// create cell
pCellNew = Abc_SclFindSmallestGate( pCell, Load / GainGate );
Abc_SclObjSetCell( pObj, pCellNew );
diff --git a/src/map/scl/sclDnsize.c b/src/map/scl/sclDnsize.c
index c4bfc0b9..6060385e 100644
--- a/src/map/scl/sclDnsize.c
+++ b/src/map/scl/sclDnsize.c
@@ -239,7 +239,7 @@ void Abc_SclDnsizePrint( SC_Man * p, int Iter, int nAttempts, int nOverlaps, int
SeeAlso []
***********************************************************************/
-void Abc_SclDnsizePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, SC_SizePars * pPars )
+void Abc_SclDnsizePerformInt( SC_Lib * pLib, Abc_Ntk_t * pNtk, SC_SizePars * pPars )
{
SC_Man * p;
Abc_Obj_t * pObj;
@@ -346,6 +346,29 @@ void Abc_SclDnsizePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, SC_SizePars * pPars
// Abc_NtkCleanMarkAB( pNtk );
}
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_SclDnsizePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, SC_SizePars * pPars )
+{
+ Abc_Ntk_t * pNtkNew = pNtk;
+ if ( pNtk->nBarBufs2 > 0 )
+ pNtkNew = Abc_NtkDupDfsNoBarBufs( pNtk );
+ Abc_SclDnsizePerformInt( pLib, pNtkNew, pPars );
+ if ( pNtk->nBarBufs2 > 0 )
+ Abc_SclTransferGates( pNtk, pNtkNew );
+ if ( pNtk->nBarBufs2 > 0 )
+ Abc_NtkDelete( pNtkNew );
+}
+
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/scl/sclSize.c b/src/map/scl/sclSize.c
index affe0652..d323df8b 100644
--- a/src/map/scl/sclSize.c
+++ b/src/map/scl/sclSize.c
@@ -668,7 +668,7 @@ SC_Man * Abc_SclManStart( SC_Lib * pLib, Abc_Ntk_t * pNtk, int fUseWireLoads, in
SeeAlso []
***********************************************************************/
-void Abc_SclTimePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, int nTreeCRatio, int fUseWireLoads, int fShowAll, int fPrintPath, int fDumpStats )
+void Abc_SclTimePerformInt( SC_Lib * pLib, Abc_Ntk_t * pNtk, int nTreeCRatio, int fUseWireLoads, int fShowAll, int fPrintPath, int fDumpStats )
{
SC_Man * p;
p = Abc_SclManStart( pLib, pNtk, fUseWireLoads, 1, 0, nTreeCRatio );
@@ -678,6 +678,27 @@ void Abc_SclTimePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, int nTreeCRatio, int f
Abc_SclManFree( p );
}
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_SclTimePerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, int nTreeCRatio, int fUseWireLoads, int fShowAll, int fPrintPath, int fDumpStats )
+{
+ Abc_Ntk_t * pNtkNew = pNtk;
+ if ( pNtk->nBarBufs2 > 0 )
+ pNtkNew = Abc_NtkDupDfsNoBarBufs( pNtk );
+ Abc_SclTimePerformInt( pLib, pNtkNew, nTreeCRatio, fUseWireLoads, fShowAll, fPrintPath, fDumpStats );
+ if ( pNtk->nBarBufs2 > 0 )
+ Abc_NtkDelete( pNtkNew );
+}
+
/**Function*************************************************************
diff --git a/src/map/scl/sclSize.h b/src/map/scl/sclSize.h
index 78c1f2f2..3ec0d83e 100644
--- a/src/map/scl/sclSize.h
+++ b/src/map/scl/sclSize.h
@@ -430,7 +430,7 @@ static inline int Abc_SclGetBufInvCount( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i, Count = 0;
- Abc_NtkForEachNode( pNtk, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( pNtk, pObj, i )
Count += (Abc_ObjFaninNum(pObj) == 1);
return Count;
}
@@ -439,7 +439,7 @@ static inline float Abc_SclGetAverageSize( Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj;
double Total = 0;
int i, Count = 0;
- Abc_NtkForEachNode1( pNtk, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( pNtk, pObj, i )
Count++, Total += 100.0*Abc_SclObjCell(pObj)->Order/Abc_SclObjCell(pObj)->nGates;
return (float)(Total / Count);
}
@@ -448,7 +448,7 @@ static inline float Abc_SclGetTotalArea( Abc_Ntk_t * pNtk )
double Area = 0;
Abc_Obj_t * pObj;
int i;
- Abc_NtkForEachNode1( pNtk, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( pNtk, pObj, i )
Area += Abc_SclObjCell(pObj)->area;
return Area;
}
diff --git a/src/map/scl/sclUtil.c b/src/map/scl/sclUtil.c
index 5af1b88b..de33d50a 100644
--- a/src/map/scl/sclUtil.c
+++ b/src/map/scl/sclUtil.c
@@ -59,12 +59,9 @@ void Abc_SclMioGates2SclGates( SC_Lib * pLib, Abc_Ntk_t * p )
// remap cells
assert( p->vGates == NULL );
p->vGates = Vec_IntStartFull( Abc_NtkObjNumMax(p) );
- Abc_NtkForEachNode1( p, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( p, pObj, i )
{
- if ( Abc_ObjIsBarBuf(pObj) )
- gateId = bufferId;
- else
- gateId = Abc_SclCellFind( pLib, Mio_GateReadName((Mio_Gate_t *)pObj->pData) );
+ gateId = Abc_SclCellFind( pLib, Mio_GateReadName((Mio_Gate_t *)pObj->pData) );
assert( gateId >= 0 );
Vec_IntWriteEntry( p->vGates, i, gateId );
}
@@ -76,14 +73,11 @@ void Abc_SclSclGates2MioGates( SC_Lib * pLib, Abc_Ntk_t * p )
SC_Cell * pCell;
int i, Counter = 0, CounterAll = 0;
assert( p->vGates != NULL );
- Abc_NtkForEachNode1( p, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( p, pObj, i )
{
pCell = Abc_SclObjCell(pObj);
assert( pCell->n_inputs == Abc_ObjFaninNum(pObj) );
- if ( Abc_ObjIsBarBuf(pObj) )
- pObj->pData = NULL;
- else
- pObj->pData = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pManFunc, pCell->pName, NULL );
+ pObj->pData = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pManFunc, pCell->pName, NULL );
Counter += (pObj->pData == NULL);
assert( pObj->fMarkA == 0 && pObj->fMarkB == 0 );
CounterAll++;
@@ -110,12 +104,10 @@ void Abc_SclTransferGates( Abc_Ntk_t * pOld, Abc_Ntk_t * pNew )
Abc_Obj_t * pObj; int i;
assert( pOld->nBarBufs2 > 0 );
assert( pNew->nBarBufs2 == 0 );
- Abc_NtkForEachNode( pOld, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf( pOld, pObj, i )
{
if ( pObj->pCopy == NULL )
continue;
- if ( Abc_ObjIsBarBuf(pObj) )
- continue;
assert( Abc_ObjNtk(pObj->pCopy) == pNew );
pObj->pData = pObj->pCopy->pData;
}
@@ -139,7 +131,7 @@ void Abc_SclManPrintGateSizes( SC_Lib * pLib, Abc_Ntk_t * p, Vec_Int_t * vGates
SC_Cell * pCell;
int i, nGates = 0, Counters[ABC_SCL_MAX_SIZE] = {0};
double TotArea = 0, Areas[ABC_SCL_MAX_SIZE] = {0};
- Abc_NtkForEachNode1( p, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( p, pObj, i )
{
pCell = SC_LibCell( pLib, Vec_IntEntry(vGates, Abc_ObjId(pObj)) );
assert( pCell->Order < ABC_SCL_MAX_SIZE );
@@ -216,7 +208,7 @@ void Abc_SclMinsizePerform( SC_Lib * pLib, Abc_Ntk_t * p, int fUseMax, int fVerb
int i, gateId;
vMinCells = Abc_SclFindMinAreas( pLib, fUseMax );
Abc_SclMioGates2SclGates( pLib, p );
- Abc_NtkForEachNode1( p, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( p, pObj, i )
{
gateId = Vec_IntEntry( p->vGates, i );
assert( gateId >= 0 && gateId < Vec_PtrSize(pLib->vCells) );
@@ -233,7 +225,7 @@ int Abc_SclCountMinSize( SC_Lib * pLib, Abc_Ntk_t * p, int fUseMax )
Abc_Obj_t * pObj;
int i, gateId, Counter = 0;
vMinCells = Abc_SclFindMinAreas( pLib, fUseMax );
- Abc_NtkForEachNode1( p, pObj, i )
+ Abc_NtkForEachNodeNotBarBuf1( p, pObj, i )
{
gateId = Vec_IntEntry( p->vGates, i );
Counter += ( gateId == Vec_IntEntry(vMinCells, gateId) );